diff options
author | David Daney <ddaney@caviumnetworks.com> | 2009-01-08 19:46:40 -0500 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2009-01-11 04:57:21 -0500 |
commit | 5b3b16880f404ca54126210ca86141cceeafc0cf (patch) | |
tree | f69d30450a923782534d4ae257f20aace0a0be74 /arch/mips/mm/cex-oct.S | |
parent | 58f07778ce9d32c22cecb1d8ef348001f0e705c9 (diff) |
MIPS: Add Cavium OCTEON processor support files to arch/mips/cavium-octeon.
These are the rest of the new files needed to add OCTEON processor
support to the Linux kernel. Other than Makefile and Kconfig which
should be obvious, we have:
csrc-octeon.c -- Clock source driver for OCTEON.
dma-octeon.c -- Helper functions for mapping DMA memory.
flash_setup.c -- Register on-board flash with the MTD subsystem.
octeon-irq.c -- OCTEON interrupt controller managment.
octeon-memcpy.S -- Optimized memcpy() implementation.
serial.c -- Register 8250 platform driver and early console.
setup.c -- Early architecture initialization.
smp.c -- OCTEON SMP support.
octeon_switch.S -- Scheduler context switch for OCTEON.
c-octeon.c -- OCTEON cache controller support.
cex-oct.S -- OCTEON cache exception handler.
asm/mach-cavium-octeon/*.h -- Architecture include files.
Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com>
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
create mode 100644 arch/mips/cavium-octeon/Kconfig
create mode 100644 arch/mips/cavium-octeon/Makefile
create mode 100644 arch/mips/cavium-octeon/csrc-octeon.c
create mode 100644 arch/mips/cavium-octeon/dma-octeon.c
create mode 100644 arch/mips/cavium-octeon/flash_setup.c
create mode 100644 arch/mips/cavium-octeon/octeon-irq.c
create mode 100644 arch/mips/cavium-octeon/octeon-memcpy.S
create mode 100644 arch/mips/cavium-octeon/serial.c
create mode 100644 arch/mips/cavium-octeon/setup.c
create mode 100644 arch/mips/cavium-octeon/smp.c
create mode 100644 arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
create mode 100644 arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h
create mode 100644 arch/mips/include/asm/mach-cavium-octeon/irq.h
create mode 100644 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h
create mode 100644 arch/mips/include/asm/mach-cavium-octeon/war.h
create mode 100644 arch/mips/include/asm/octeon/octeon.h
create mode 100644 arch/mips/kernel/octeon_switch.S
create mode 100644 arch/mips/mm/c-octeon.c
create mode 100644 arch/mips/mm/cex-oct.S
Diffstat (limited to 'arch/mips/mm/cex-oct.S')
-rw-r--r-- | arch/mips/mm/cex-oct.S | 70 |
1 files changed, 70 insertions, 0 deletions
diff --git a/arch/mips/mm/cex-oct.S b/arch/mips/mm/cex-oct.S new file mode 100644 index 000000000000..3db8553fcd34 --- /dev/null +++ b/arch/mips/mm/cex-oct.S | |||
@@ -0,0 +1,70 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2006 Cavium Networks | ||
7 | * Cache error handler | ||
8 | */ | ||
9 | |||
10 | #include <asm/asm.h> | ||
11 | #include <asm/regdef.h> | ||
12 | #include <asm/mipsregs.h> | ||
13 | #include <asm/stackframe.h> | ||
14 | |||
15 | /* | ||
16 | * Handle cache error. Indicate to the second level handler whether | ||
17 | * the exception is recoverable. | ||
18 | */ | ||
19 | LEAF(except_vec2_octeon) | ||
20 | |||
21 | .set push | ||
22 | .set mips64r2 | ||
23 | .set noreorder | ||
24 | .set noat | ||
25 | |||
26 | |||
27 | /* due to an errata we need to read the COP0 CacheErr (Dcache) | ||
28 | * before any cache/DRAM access */ | ||
29 | |||
30 | rdhwr k0, $0 /* get core_id */ | ||
31 | PTR_LA k1, cache_err_dcache | ||
32 | sll k0, k0, 3 | ||
33 | PTR_ADDU k1, k0, k1 /* k1 = &cache_err_dcache[core_id] */ | ||
34 | |||
35 | dmfc0 k0, CP0_CACHEERR, 1 | ||
36 | sd k0, (k1) | ||
37 | dmtc0 $0, CP0_CACHEERR, 1 | ||
38 | |||
39 | /* check whether this is a nested exception */ | ||
40 | mfc0 k1, CP0_STATUS | ||
41 | andi k1, k1, ST0_EXL | ||
42 | beqz k1, 1f | ||
43 | nop | ||
44 | j cache_parity_error_octeon_non_recoverable | ||
45 | nop | ||
46 | |||
47 | /* exception is recoverable */ | ||
48 | 1: j handle_cache_err | ||
49 | nop | ||
50 | |||
51 | .set pop | ||
52 | END(except_vec2_octeon) | ||
53 | |||
54 | /* We need to jump to handle_cache_err so that the previous handler | ||
55 | * can fit within 0x80 bytes. We also move from 0xFFFFFFFFAXXXXXXX | ||
56 | * space (uncached) to the 0xFFFFFFFF8XXXXXXX space (cached). */ | ||
57 | LEAF(handle_cache_err) | ||
58 | .set push | ||
59 | .set noreorder | ||
60 | .set noat | ||
61 | |||
62 | SAVE_ALL | ||
63 | KMODE | ||
64 | jal cache_parity_error_octeon_recoverable | ||
65 | nop | ||
66 | j ret_from_exception | ||
67 | nop | ||
68 | |||
69 | .set pop | ||
70 | END(handle_cache_err) | ||