[MIPS] Fix loads of section missmatches

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1 files changed, 3 insertions, 2 deletions

diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c
index 6a24651971df..51ab1faa027d 100644
--- a/arch/mips/mm/cache.c
+++ b/arch/mips/mm/cache.c
@@ -127,9 +127,10 @@ void __update_cache(struct vm_area_struct *vma, unsigned long address,
         }
 }
 
-static char cache_panic[] __initdata = "Yeee, unsupported cache architecture.";
+static char cache_panic[] __cpuinitdata =
+        "Yeee, unsupported cache architecture.";
 
-void __init cpu_cache_init(void)
+void __devinit cpu_cache_init(void)
 {
         if (cpu_has_3k_cache) {
                 extern void __weak r3k_cache_init(void);