diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-02-27 19:48:33 -0500 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-02-27 19:48:33 -0500 |
| commit | 7187adbf08336bd69da11d42d2542de7b1cc6957 (patch) | |
| tree | 83e35e8386b979edc652cda9f9356ad96e5c8ad2 /arch/mips/mm/cache.c | |
| parent | 535d8e8f19376518e52e64f511440e502acda150 (diff) | |
| parent | 5312dc6bc0df9c5ffae543b6f62e4d0970ad2cc6 (diff) | |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
Revert "MIPS: Print irq handler description"
MIPS: CVE-2009-0029: Enable syscall wrappers.
MIPS: Alchemy: In plat_time_init() t reaches -1, tested: 0
MIPS: Only allow Cavium OCTEON to be configured for boards that support it
Diffstat (limited to 'arch/mips/mm/cache.c')
| -rw-r--r-- | arch/mips/mm/cache.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c index 98ad0a82c29e..694d51f523d1 100644 --- a/arch/mips/mm/cache.c +++ b/arch/mips/mm/cache.c | |||
| @@ -13,6 +13,7 @@ | |||
| 13 | #include <linux/linkage.h> | 13 | #include <linux/linkage.h> |
| 14 | #include <linux/module.h> | 14 | #include <linux/module.h> |
| 15 | #include <linux/sched.h> | 15 | #include <linux/sched.h> |
| 16 | #include <linux/syscalls.h> | ||
| 16 | #include <linux/mm.h> | 17 | #include <linux/mm.h> |
| 17 | 18 | ||
| 18 | #include <asm/cacheflush.h> | 19 | #include <asm/cacheflush.h> |
| @@ -58,8 +59,8 @@ EXPORT_SYMBOL(_dma_cache_wback_inv); | |||
| 58 | * We could optimize the case where the cache argument is not BCACHE but | 59 | * We could optimize the case where the cache argument is not BCACHE but |
| 59 | * that seems very atypical use ... | 60 | * that seems very atypical use ... |
| 60 | */ | 61 | */ |
| 61 | asmlinkage int sys_cacheflush(unsigned long addr, | 62 | SYSCALL_DEFINE3(cacheflush, unsigned long, addr, unsigned long, bytes, |
| 62 | unsigned long bytes, unsigned int cache) | 63 | unsigned int, cache) |
| 63 | { | 64 | { |
| 64 | if (bytes == 0) | 65 | if (bytes == 0) |
| 65 | return 0; | 66 | return 0; |
