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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-04-19 12:17:29 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-04-19 12:17:29 -0400
commitadf6d34e460387ee3e8f1e1875d52bff51212c7d (patch)
tree88ef100143e6184103a608f82dfd232bf6376eaf /arch/mips/mm/c-tx39.c
parentd1964dab60ce7c104dd21590e987a8787db18051 (diff)
parent3760d31f11bfbd0ead9eaeb8573e0602437a9d7c (diff)
Merge branch 'omap2-upstream' into devel
Diffstat (limited to 'arch/mips/mm/c-tx39.c')
-rw-r--r--arch/mips/mm/c-tx39.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/mips/mm/c-tx39.c b/arch/mips/mm/c-tx39.c
index b09d56981d53..a9f7f1f5e9b4 100644
--- a/arch/mips/mm/c-tx39.c
+++ b/arch/mips/mm/c-tx39.c
@@ -122,6 +122,16 @@ static inline void tx39_blast_icache(void)
122 local_irq_restore(flags); 122 local_irq_restore(flags);
123} 123}
124 124
125static void tx39__flush_cache_vmap(void)
126{
127 tx39_blast_dcache();
128}
129
130static void tx39__flush_cache_vunmap(void)
131{
132 tx39_blast_dcache();
133}
134
125static inline void tx39_flush_cache_all(void) 135static inline void tx39_flush_cache_all(void)
126{ 136{
127 if (!cpu_has_dc_aliases) 137 if (!cpu_has_dc_aliases)
@@ -344,6 +354,8 @@ void __cpuinit tx39_cache_init(void)
344 switch (current_cpu_type()) { 354 switch (current_cpu_type()) {
345 case CPU_TX3912: 355 case CPU_TX3912:
346 /* TX39/H core (writethru direct-map cache) */ 356 /* TX39/H core (writethru direct-map cache) */
357 __flush_cache_vmap = tx39__flush_cache_vmap;
358 __flush_cache_vunmap = tx39__flush_cache_vunmap;
347 flush_cache_all = tx39h_flush_icache_all; 359 flush_cache_all = tx39h_flush_icache_all;
348 __flush_cache_all = tx39h_flush_icache_all; 360 __flush_cache_all = tx39h_flush_icache_all;
349 flush_cache_mm = (void *) tx39h_flush_icache_all; 361 flush_cache_mm = (void *) tx39h_flush_icache_all;
@@ -369,6 +381,9 @@ void __cpuinit tx39_cache_init(void)
369 write_c0_wired(0); /* set 8 on reset... */ 381 write_c0_wired(0); /* set 8 on reset... */
370 /* board-dependent init code may set WBON */ 382 /* board-dependent init code may set WBON */
371 383
384 __flush_cache_vmap = tx39__flush_cache_vmap;
385 __flush_cache_vunmap = tx39__flush_cache_vunmap;
386
372 flush_cache_all = tx39_flush_cache_all; 387 flush_cache_all = tx39_flush_cache_all;
373 __flush_cache_all = tx39___flush_cache_all; 388 __flush_cache_all = tx39___flush_cache_all;
374 flush_cache_mm = tx39_flush_cache_mm; 389 flush_cache_mm = tx39_flush_cache_mm;