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author | Linus Torvalds <torvalds@woody.osdl.org> | 2006-12-01 19:44:02 -0500 |
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committer | Linus Torvalds <torvalds@woody.osdl.org> | 2006-12-01 19:44:02 -0500 |
commit | c3e59d1e891f6140a346de2b8547e25133c716b0 (patch) | |
tree | b2a669f625009a3a33f20f648bd654637323d296 /arch/mips/mm/c-r4k.c | |
parent | b07e3c3a1db0ce399d2a1d04860e1b901927c05e (diff) | |
parent | aa414dff4f7bef29457592414551becdca72dd6b (diff) |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (31 commits)
[MIPS] Remove duplicate ISA DMA code for 0 DMA channel case.
[MIPS] Remove unused definition of cpu_to_lelongp()
[MIPS] Remove userspace proofing from <asm/bitops.h>.
[MIPS] Remove old junk left from old atomic_lock.
[MIPS] Use conditional traps for BUG_ON on MIPS II and better.
[MIPS] mips HPT cleanup: make clocksource_mips public
[MIPS] do_IRQ cleanup
[MIPS] Avoid dupliate D-cache flush on R400C / R4400 SC and MC variants.
[MIPS] Remove redundant r4k_blast_icache() calls
[MIPS] Work around bogus gcc warnings.
[MIPS] Fix double inclusions
[MIPS] use generic_handle_irq, handle_level_irq, handle_percpu_irq
[MIPS] IRQ cleanups
[MIPS] mips hpt cleanup: get rid of mips_hpt_init
[MIPS] PB1200: Remove duplicate definitions
[MIPS] Fix alignment hole in struct cache_desc; shrink struct.
[MIPS] Oprofile: kernel support for the R10000.
[MIPS] Remove unused R10000 performance counter definitions.
[MIPS] Add support for kexec
[MIPS] Don't print presence of WAIT instruction on bootup.
...
Diffstat (limited to 'arch/mips/mm/c-r4k.c')
-rw-r--r-- | arch/mips/mm/c-r4k.c | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index cc895dad71d2..df04a315d830 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c | |||
@@ -323,7 +323,6 @@ static void __init r4k_blast_scache_setup(void) | |||
323 | static inline void local_r4k_flush_cache_all(void * args) | 323 | static inline void local_r4k_flush_cache_all(void * args) |
324 | { | 324 | { |
325 | r4k_blast_dcache(); | 325 | r4k_blast_dcache(); |
326 | r4k_blast_icache(); | ||
327 | } | 326 | } |
328 | 327 | ||
329 | static void r4k_flush_cache_all(void) | 328 | static void r4k_flush_cache_all(void) |
@@ -359,21 +358,19 @@ static void r4k___flush_cache_all(void) | |||
359 | static inline void local_r4k_flush_cache_range(void * args) | 358 | static inline void local_r4k_flush_cache_range(void * args) |
360 | { | 359 | { |
361 | struct vm_area_struct *vma = args; | 360 | struct vm_area_struct *vma = args; |
362 | int exec; | ||
363 | 361 | ||
364 | if (!(cpu_context(smp_processor_id(), vma->vm_mm))) | 362 | if (!(cpu_context(smp_processor_id(), vma->vm_mm))) |
365 | return; | 363 | return; |
366 | 364 | ||
367 | exec = vma->vm_flags & VM_EXEC; | 365 | r4k_blast_dcache(); |
368 | if (cpu_has_dc_aliases || exec) | ||
369 | r4k_blast_dcache(); | ||
370 | if (exec) | ||
371 | r4k_blast_icache(); | ||
372 | } | 366 | } |
373 | 367 | ||
374 | static void r4k_flush_cache_range(struct vm_area_struct *vma, | 368 | static void r4k_flush_cache_range(struct vm_area_struct *vma, |
375 | unsigned long start, unsigned long end) | 369 | unsigned long start, unsigned long end) |
376 | { | 370 | { |
371 | if (!cpu_has_dc_aliases) | ||
372 | return; | ||
373 | |||
377 | r4k_on_each_cpu(local_r4k_flush_cache_range, vma, 1, 1); | 374 | r4k_on_each_cpu(local_r4k_flush_cache_range, vma, 1, 1); |
378 | } | 375 | } |
379 | 376 | ||
@@ -384,18 +381,21 @@ static inline void local_r4k_flush_cache_mm(void * args) | |||
384 | if (!cpu_context(smp_processor_id(), mm)) | 381 | if (!cpu_context(smp_processor_id(), mm)) |
385 | return; | 382 | return; |
386 | 383 | ||
387 | r4k_blast_dcache(); | ||
388 | r4k_blast_icache(); | ||
389 | |||
390 | /* | 384 | /* |
391 | * Kludge alert. For obscure reasons R4000SC and R4400SC go nuts if we | 385 | * Kludge alert. For obscure reasons R4000SC and R4400SC go nuts if we |
392 | * only flush the primary caches but R10000 and R12000 behave sane ... | 386 | * only flush the primary caches but R10000 and R12000 behave sane ... |
387 | * R4000SC and R4400SC indexed S-cache ops also invalidate primary | ||
388 | * caches, so we can bail out early. | ||
393 | */ | 389 | */ |
394 | if (current_cpu_data.cputype == CPU_R4000SC || | 390 | if (current_cpu_data.cputype == CPU_R4000SC || |
395 | current_cpu_data.cputype == CPU_R4000MC || | 391 | current_cpu_data.cputype == CPU_R4000MC || |
396 | current_cpu_data.cputype == CPU_R4400SC || | 392 | current_cpu_data.cputype == CPU_R4400SC || |
397 | current_cpu_data.cputype == CPU_R4400MC) | 393 | current_cpu_data.cputype == CPU_R4400MC) { |
398 | r4k_blast_scache(); | 394 | r4k_blast_scache(); |
395 | return; | ||
396 | } | ||
397 | |||
398 | r4k_blast_dcache(); | ||
399 | } | 399 | } |
400 | 400 | ||
401 | static void r4k_flush_cache_mm(struct mm_struct *mm) | 401 | static void r4k_flush_cache_mm(struct mm_struct *mm) |