diff options
author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2007-02-28 11:53:13 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2007-03-04 14:02:35 -0500 |
commit | 12e4396bf0b1cd62c9d71a06596914c7efa7dbaf (patch) | |
tree | 5cac3c54cbd025c9e382b0aec0a39ea8bcfd4a6f /arch/mips/mips-boards | |
parent | a0574e04807608998d4d115c07b7bc12bb499a44 (diff) |
[MIPS] No need to write c0_compare in plat_timer_setup
If R4k counter was used for hpt_timer and interrupt source,
c0_hpt_timer_init() initializes the c0_compare register.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mips-boards')
-rw-r--r-- | arch/mips/mips-boards/generic/time.c | 3 | ||||
-rw-r--r-- | arch/mips/mips-boards/sim/sim_time.c | 3 |
2 files changed, 0 insertions, 6 deletions
diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c index a3c3a1d462b2..df2a2bd3aa5d 100644 --- a/arch/mips/mips-boards/generic/time.c +++ b/arch/mips/mips-boards/generic/time.c | |||
@@ -295,7 +295,4 @@ void __init plat_timer_setup(struct irqaction *irq) | |||
295 | irq_desc[mips_cpu_timer_irq].status |= IRQ_PER_CPU; | 295 | irq_desc[mips_cpu_timer_irq].status |= IRQ_PER_CPU; |
296 | set_irq_handler(mips_cpu_timer_irq, handle_percpu_irq); | 296 | set_irq_handler(mips_cpu_timer_irq, handle_percpu_irq); |
297 | #endif | 297 | #endif |
298 | |||
299 | /* to generate the first timer interrupt */ | ||
300 | write_c0_compare (read_c0_count() + mips_hpt_frequency/HZ); | ||
301 | } | 298 | } |
diff --git a/arch/mips/mips-boards/sim/sim_time.c b/arch/mips/mips-boards/sim/sim_time.c index 30711d016fed..d3a21c741514 100644 --- a/arch/mips/mips-boards/sim/sim_time.c +++ b/arch/mips/mips-boards/sim/sim_time.c | |||
@@ -199,7 +199,4 @@ void __init plat_timer_setup(struct irqaction *irq) | |||
199 | irq_desc[mips_cpu_timer_irq].flags |= IRQ_PER_CPU; | 199 | irq_desc[mips_cpu_timer_irq].flags |= IRQ_PER_CPU; |
200 | set_irq_handler(mips_cpu_timer_irq, handle_percpu_irq); | 200 | set_irq_handler(mips_cpu_timer_irq, handle_percpu_irq); |
201 | #endif | 201 | #endif |
202 | |||
203 | /* to generate the first timer interrupt */ | ||
204 | write_c0_compare(read_c0_count() + (mips_hpt_frequency/HZ)); | ||
205 | } | 202 | } |