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authorRalf Baechle <ralf@linux-mips.org>2006-10-31 13:33:09 -0500
committerRalf Baechle <ralf@linux-mips.org>2006-10-31 15:13:22 -0500
commit70e46f48cb5933119712ee27945309a4bfc98282 (patch)
treec9a35ca3652659562e8bc534ca2caf563d9ccd88 /arch/mips/mips-boards
parente79f55a8c7aaae5a33e8c2b29682ec8e603b5434 (diff)
[MIPS] VSMP: Synchronize cp0 counters on bootup.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mips-boards')
-rw-r--r--arch/mips/mips-boards/generic/time.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c
index 659706705005..d817c60c5ca5 100644
--- a/arch/mips/mips-boards/generic/time.c
+++ b/arch/mips/mips-boards/generic/time.c
@@ -209,6 +209,7 @@ static unsigned int __init estimate_cpu_frequency(void)
209#endif 209#endif
210#if defined(CONFIG_MIPS_ATLAS) || defined(CONFIG_MIPS_MALTA) 210#if defined(CONFIG_MIPS_ATLAS) || defined(CONFIG_MIPS_MALTA)
211 unsigned long flags; 211 unsigned long flags;
212 unsigned int start;
212 213
213 local_irq_save(flags); 214 local_irq_save(flags);
214 215
@@ -217,13 +218,13 @@ static unsigned int __init estimate_cpu_frequency(void)
217 while (!(CMOS_READ(RTC_REG_A) & RTC_UIP)); 218 while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
218 219
219 /* Start r4k counter. */ 220 /* Start r4k counter. */
220 write_c0_count(0); 221 start = read_c0_count();
221 222
222 /* Read counter exactly on falling edge of update flag */ 223 /* Read counter exactly on falling edge of update flag */
223 while (CMOS_READ(RTC_REG_A) & RTC_UIP); 224 while (CMOS_READ(RTC_REG_A) & RTC_UIP);
224 while (!(CMOS_READ(RTC_REG_A) & RTC_UIP)); 225 while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
225 226
226 count = read_c0_count(); 227 count = read_c0_count() - start;
227 228
228 /* restore interrupts */ 229 /* restore interrupts */
229 local_irq_restore(flags); 230 local_irq_restore(flags);