[MIPS] Don't drag a platform specific header into generic arch code.

For some platforms it's definitions may conflict.  So that's the one-liner.
The rest is 10 square kilometers of collateral damage fixup this include
used to paper over.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

2 files changed, 5 insertions, 5 deletions

diff --git a/arch/mips/mips-boards/sim/sim_int.c b/arch/mips/mips-boards/sim/sim_int.c
index 15ac0655c1ff..766e0159ee5b 100644
--- a/arch/mips/mips-boards/sim/sim_int.c
+++ b/arch/mips/mips-boards/sim/sim_int.c
@@ -77,7 +77,7 @@ asmlinkage void plat_irq_dispatch(void)
         irq = irq_ffs(pending);
 
         if (irq > 0)
-                do_IRQ(MIPSCPU_INT_BASE + irq);
+                do_IRQ(MIPS_CPU_IRQ_BASE + irq);
         else
                 spurious_interrupt();
 }
diff --git a/arch/mips/mips-boards/sim/sim_time.c b/arch/mips/mips-boards/sim/sim_time.c
index d3a21c741514..7224ffe31d36 100644
--- a/arch/mips/mips-boards/sim/sim_time.c
+++ b/arch/mips/mips-boards/sim/sim_time.c
@@ -71,8 +71,8 @@ irqreturn_t sim_timer_interrupt(int irq, void *dev_id)
 
         int vpflags = dvpe();
         write_c0_compare (read_c0_count() - 1);
-        clear_c0_cause(0x100 << MIPSCPU_INT_CPUCTR);
-        set_c0_status(0x100 << MIPSCPU_INT_CPUCTR);
+        clear_c0_cause(0x100 << cp0_compare_irq);
+        set_c0_status(0x100 << cp0_compare_irq);
         irq_enable_hazard();
         evpe(vpflags);
 
@@ -183,8 +183,8 @@ void __init plat_timer_setup(struct irqaction *irq)
         }
         else {
                 if (cpu_has_vint)
-                        set_vi_handler(MIPSCPU_INT_CPUCTR, mips_timer_dispatch);
-                mips_cpu_timer_irq = MIPSCPU_INT_BASE + MIPSCPU_INT_CPUCTR;
+                        set_vi_handler(cp0_compare_irq, mips_timer_dispatch);
+                mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;
         }
 
         /* we are using the cpu counter for timer interrupts */