diff options
author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2007-01-07 12:14:29 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2007-02-06 11:53:08 -0500 |
commit | 97dcb82de6cc99a5669eb8e342efc24cceb1e77e (patch) | |
tree | e195fd57deda8d38652c746c04a7c374cdf951a0 /arch/mips/mips-boards/sim | |
parent | b6ec8f069bf202d2bd888aa9137b2cc3aad4c573 (diff) |
[MIPS] Define MIPS_CPU_IRQ_BASE in generic header
The irq_base for {mips,rm7k,rm9k}_cpu_irq_init() are constant on all
platforms and are same value on most platforms (0 or 16, depends on
CONFIG_I8259). Define them in asm-mips/mach-generic/irq.h and make
them customizable. This will save a few cycle on each CPU interrupt.
A good side effect is removing some dependencies to MALTA in generic
SMTC code.
Although MIPS_CPU_IRQ_BASE is customizable, this patch changes irq
mappings on DDB5477, EMMA2RH and MIPS_SIM, since really customizing
them might cause some header dependency problem and there seems no
good reason to customize it. So currently only VR41XX is using custom
MIPS_CPU_IRQ_BASE value, which is 0 regardless of CONFIG_I8259.
Testing this patch on those platforms is greatly appreciated. Thank
you.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mips-boards/sim')
-rw-r--r-- | arch/mips/mips-boards/sim/sim_int.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/arch/mips/mips-boards/sim/sim_int.c b/arch/mips/mips-boards/sim/sim_int.c index 2ce449dce6f2..15ac0655c1ff 100644 --- a/arch/mips/mips-boards/sim/sim_int.c +++ b/arch/mips/mips-boards/sim/sim_int.c | |||
@@ -21,9 +21,7 @@ | |||
21 | #include <linux/interrupt.h> | 21 | #include <linux/interrupt.h> |
22 | #include <linux/kernel_stat.h> | 22 | #include <linux/kernel_stat.h> |
23 | #include <asm/mips-boards/simint.h> | 23 | #include <asm/mips-boards/simint.h> |
24 | 24 | #include <asm/irq_cpu.h> | |
25 | |||
26 | extern void mips_cpu_irq_init(int); | ||
27 | 25 | ||
28 | static inline int clz(unsigned long x) | 26 | static inline int clz(unsigned long x) |
29 | { | 27 | { |
@@ -86,5 +84,5 @@ asmlinkage void plat_irq_dispatch(void) | |||
86 | 84 | ||
87 | void __init arch_init_irq(void) | 85 | void __init arch_init_irq(void) |
88 | { | 86 | { |
89 | mips_cpu_irq_init(MIPSCPU_INT_BASE); | 87 | mips_cpu_irq_init(); |
90 | } | 88 | } |