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authorRalf Baechle <ralf@linux-mips.org>2006-10-07 14:44:33 -0400
committerRalf Baechle <ralf@linux-mips.org>2006-10-07 21:38:28 -0400
commit937a801576f954bd030d7c4a5a94571710d87c0b (patch)
tree48d3440f765b56cf32a89b4b8193dd033d8227a8 /arch/mips/mips-boards/sim
parent31aa36658a123263a9a69896e348b9600e050679 (diff)
[MIPS] Complete fixes after removal of pt_regs argument to int handlers.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mips-boards/sim')
-rw-r--r--arch/mips/mips-boards/sim/sim_int.c11
-rw-r--r--arch/mips/mips-boards/sim/sim_time.c14
2 files changed, 10 insertions, 15 deletions
diff --git a/arch/mips/mips-boards/sim/sim_int.c b/arch/mips/mips-boards/sim/sim_int.c
index 2c15c8efec4e..2ce449dce6f2 100644
--- a/arch/mips/mips-boards/sim/sim_int.c
+++ b/arch/mips/mips-boards/sim/sim_int.c
@@ -71,12 +71,7 @@ static inline unsigned int irq_ffs(unsigned int pending)
71#endif 71#endif
72} 72}
73 73
74static inline void sim_hw0_irqdispatch(struct pt_regs *regs) 74asmlinkage void plat_irq_dispatch(void)
75{
76 do_IRQ(2, regs);
77}
78
79asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
80{ 75{
81 unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM; 76 unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
82 int irq; 77 int irq;
@@ -84,9 +79,9 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
84 irq = irq_ffs(pending); 79 irq = irq_ffs(pending);
85 80
86 if (irq > 0) 81 if (irq > 0)
87 do_IRQ(MIPSCPU_INT_BASE + irq, regs); 82 do_IRQ(MIPSCPU_INT_BASE + irq);
88 else 83 else
89 spurious_interrupt(regs); 84 spurious_interrupt();
90} 85}
91 86
92void __init arch_init_irq(void) 87void __init arch_init_irq(void)
diff --git a/arch/mips/mips-boards/sim/sim_time.c b/arch/mips/mips-boards/sim/sim_time.c
index 230929ecd57f..acd83a379559 100644
--- a/arch/mips/mips-boards/sim/sim_time.c
+++ b/arch/mips/mips-boards/sim/sim_time.c
@@ -33,7 +33,7 @@
33 33
34unsigned long cpu_khz; 34unsigned long cpu_khz;
35 35
36irqreturn_t sim_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) 36irqreturn_t sim_timer_interrupt(int irq, void *dev_id)
37{ 37{
38#ifdef CONFIG_SMP 38#ifdef CONFIG_SMP
39 int cpu = smp_processor_id(); 39 int cpu = smp_processor_id();
@@ -44,7 +44,7 @@ irqreturn_t sim_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
44 */ 44 */
45#ifndef CONFIG_MIPS_MT_SMTC 45#ifndef CONFIG_MIPS_MT_SMTC
46 if (cpu == 0) { 46 if (cpu == 0) {
47 timer_interrupt(irq, dev_id, regs); 47 timer_interrupt(irq, dev_id);
48 } 48 }
49 else { 49 else {
50 /* Everyone else needs to reset the timer int here as 50 /* Everyone else needs to reset the timer int here as
@@ -84,7 +84,7 @@ irqreturn_t sim_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
84 irq_enable_hazard(); 84 irq_enable_hazard();
85 evpe(vpflags); 85 evpe(vpflags);
86 86
87 if(cpu_data[cpu].vpe_id == 0) timer_interrupt(irq, dev_id, regs); 87 if(cpu_data[cpu].vpe_id == 0) timer_interrupt(irq, dev_id);
88 else write_c0_compare (read_c0_count() + ( mips_hpt_frequency/HZ)); 88 else write_c0_compare (read_c0_count() + ( mips_hpt_frequency/HZ));
89 smtc_timer_broadcast(cpu_data[cpu].vpe_id); 89 smtc_timer_broadcast(cpu_data[cpu].vpe_id);
90 90
@@ -93,10 +93,10 @@ irqreturn_t sim_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
93 /* 93 /*
94 * every CPU should do profiling and process accounting 94 * every CPU should do profiling and process accounting
95 */ 95 */
96 local_timer_interrupt (irq, dev_id, regs); 96 local_timer_interrupt (irq, dev_id);
97 return IRQ_HANDLED; 97 return IRQ_HANDLED;
98#else 98#else
99 return timer_interrupt (irq, dev_id, regs); 99 return timer_interrupt (irq, dev_id);
100#endif 100#endif
101} 101}
102 102
@@ -177,9 +177,9 @@ void __init sim_time_init(void)
177 177
178static int mips_cpu_timer_irq; 178static int mips_cpu_timer_irq;
179 179
180static void mips_timer_dispatch (struct pt_regs *regs) 180static void mips_timer_dispatch(void)
181{ 181{
182 do_IRQ (mips_cpu_timer_irq, regs); 182 do_IRQ(mips_cpu_timer_irq);
183} 183}
184 184
185 185