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author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-03-21 12:22:41 -0500 |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-03-21 12:22:41 -0500 |
commit | e031d33efde817ce6b4f907f0fa1ff021301748f (patch) | |
tree | 2e9ba300db601f61fdc32813f55114d363d3d4e2 /arch/mips/mips-boards/sim/sim_smp.c | |
parent | 52aef8183fbedb0232b20127b089e85e7aa095e3 (diff) | |
parent | 48e08101c0fa0e1767cdef13fdaea79cad3106a2 (diff) |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
[MIPS] Update defconfigs.
[MIPS] Separate CPU entries in /proc/cpuinfo with a blank line.
[MIPS] sys_mmap2 offset argument should always be shifted 12, not PAGE_SHIFT.
[MIPS] TX49XX has prefetch.
[MIPS] Kill tlb-andes.c.
[MIPS] War on whitespace: cleanup initial spaces followed by tabs.
[MIPS] Makefile crapectomy.
[MIPS] Reformat __xchg().
[MIPS] Mention Broadcom part number for BigSur board
[MIPS] Remove CONFIG_BUILD_ELF64.
[MIPS] Further sparsification for 32-bit compat code.
[MIPS] fix wrong __user usage in _sysn32_rt_sigsuspend
[MIPS] Signal cleanup
[MIPS] Reformat all of signal32.c with tabs instead of space for consistency
[MIPS] Delete unused sys32_waitpid.
[MIPS] Make I/O helpers more customizable
[MIPS] Symmetric Uniprocessor support for Qemu.
[MIPS] sc-rm7k.c cleanup
[MIPS] MIPS64 R2 optimizations for 64-bit endianess swapping.
[MIPS] Add early console for Cobalt.
Diffstat (limited to 'arch/mips/mips-boards/sim/sim_smp.c')
-rw-r--r-- | arch/mips/mips-boards/sim/sim_smp.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/mips-boards/sim/sim_smp.c b/arch/mips/mips-boards/sim/sim_smp.c index 19824359f5de..a9f0c2bfe4ad 100644 --- a/arch/mips/mips-boards/sim/sim_smp.c +++ b/arch/mips/mips-boards/sim/sim_smp.c | |||
@@ -115,7 +115,7 @@ void prom_prepare_cpus(unsigned int max_cpus) | |||
115 | #ifdef CONFIG_MIPS_MT_SMTC | 115 | #ifdef CONFIG_MIPS_MT_SMTC |
116 | void mipsmt_prepare_cpus(int c); | 116 | void mipsmt_prepare_cpus(int c); |
117 | /* | 117 | /* |
118 | * As noted above, we can assume a single CPU for now | 118 | * As noted above, we can assume a single CPU for now |
119 | * but it may be multithreaded. | 119 | * but it may be multithreaded. |
120 | */ | 120 | */ |
121 | 121 | ||