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authorMaciej W. Rozycki <macro@linux-mips.org>2005-02-03 20:34:52 -0500
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 14:30:24 -0400
commitea7c394492cb56ff0c10ad327157f237d5bbe6b4 (patch)
tree857e7f8e421b8c5801b68d9f4de211bb2f1096e3 /arch/mips/mips-boards/sead
parent925ddb04c5eee5668e7229c71580d458ed61eb9b (diff)
Clean up SEAD interrupt initialization.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mips-boards/sead')
-rw-r--r--arch/mips/mips-boards/sead/sead_int.c12
1 files changed, 5 insertions, 7 deletions
diff --git a/arch/mips/mips-boards/sead/sead_int.c b/arch/mips/mips-boards/sead/sead_int.c
index e5109657ed5a..e1dd7e009750 100644
--- a/arch/mips/mips-boards/sead/sead_int.c
+++ b/arch/mips/mips-boards/sead/sead_int.c
@@ -2,6 +2,7 @@
2 * Carsten Langgaard, carstenl@mips.com 2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved. 3 * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
4 * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org) 4 * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org)
5 * Copyright (C) 2004 Maciej W. Rozycki
5 * 6 *
6 * This program is free software; you can distribute it and/or modify it 7 * This program is free software; you can distribute it and/or modify it
7 * under the terms of the GNU General Public License (Version 2) as 8 * under the terms of the GNU General Public License (Version 2) as
@@ -21,7 +22,9 @@
21 */ 22 */
22#include <linux/init.h> 23#include <linux/init.h>
23#include <linux/irq.h> 24#include <linux/irq.h>
24#include <linux/interrupt.h> 25
26#include <asm/irq_cpu.h>
27#include <asm/system.h>
25 28
26#include <asm/mips-boards/seadint.h> 29#include <asm/mips-boards/seadint.h>
27 30
@@ -39,13 +42,8 @@ asmlinkage void sead_hw1_irqdispatch(struct pt_regs *regs)
39 42
40void __init arch_init_irq(void) 43void __init arch_init_irq(void)
41{ 44{
42 /* 45 mips_cpu_irq_init(0);
43 * Mask out all interrupt
44 */
45 clear_c0_status(0x0000ff00);
46 46
47 /* Now safe to set the exception vector. */ 47 /* Now safe to set the exception vector. */
48 set_except_vector(0, mipsIRQ); 48 set_except_vector(0, mipsIRQ);
49
50 mips_cpu_irq_init(0);
51} 49}