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authorRalf Baechle <ralf@linux-mips.org>2007-10-11 18:46:09 -0400
committerRalf Baechle <ralf@linux-mips.org>2007-10-11 18:46:09 -0400
commit7bcf7717b6a047c272410d0cd00213185fe6b99d (patch)
tree81c5d6bbc2130815713e22bb5408ea80b6e1c499 /arch/mips/mips-boards/generic
parent91a2fcc88634663e9e13dcdfad0e4a860e64aeee (diff)
[MIPS] Implement clockevents for R4000-style cp0 count/compare interrupt
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mips-boards/generic')
-rw-r--r--arch/mips/mips-boards/generic/time.c26
1 files changed, 10 insertions, 16 deletions
diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c
index 345de881013c..2c8db3e0f4b7 100644
--- a/arch/mips/mips-boards/generic/time.c
+++ b/arch/mips/mips-boards/generic/time.c
@@ -144,20 +144,20 @@ void __init plat_time_init(void)
144 mips_scroll_message(); 144 mips_scroll_message();
145} 145}
146 146
147static irqreturn_t mips_perf_interrupt(int irq, void *dev_id) 147//static irqreturn_t mips_perf_interrupt(int irq, void *dev_id)
148{ 148//{
149 return perf_irq(); 149// return perf_irq();
150} 150//}
151 151
152static struct irqaction perf_irqaction = { 152//static struct irqaction perf_irqaction = {
153 .handler = mips_perf_interrupt, 153// .handler = mips_perf_interrupt,
154 .flags = IRQF_DISABLED | IRQF_PERCPU, 154// .flags = IRQF_DISABLED | IRQF_PERCPU,
155 .name = "performance", 155// .name = "performance",
156}; 156//};
157 157
158void __init plat_perf_setup(void) 158void __init plat_perf_setup(void)
159{ 159{
160 struct irqaction *irq = &perf_irqaction; 160// struct irqaction *irq = &perf_irqaction;
161 161
162 cp0_perfcount_irq = -1; 162 cp0_perfcount_irq = -1;
163 163
@@ -170,12 +170,6 @@ void __init plat_perf_setup(void)
170 if (cp0_perfcount_irq >= 0) { 170 if (cp0_perfcount_irq >= 0) {
171 if (cpu_has_vint) 171 if (cpu_has_vint)
172 set_vi_handler(cp0_perfcount_irq, mips_perf_dispatch); 172 set_vi_handler(cp0_perfcount_irq, mips_perf_dispatch);
173#ifdef CONFIG_MIPS_MT_SMTC
174 setup_irq_smtc(cp0_perfcount_irq, irq,
175 0x100 << cp0_perfcount_irq);
176#else
177 setup_irq(cp0_perfcount_irq, irq);
178#endif /* CONFIG_MIPS_MT_SMTC */
179#ifdef CONFIG_SMP 173#ifdef CONFIG_SMP
180 set_irq_handler(cp0_perfcount_irq, handle_percpu_irq); 174 set_irq_handler(cp0_perfcount_irq, handle_percpu_irq);
181#endif 175#endif