diff options
author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2007-01-07 11:27:40 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2007-01-08 16:41:04 -0500 |
commit | f75f369fd783d194cb45632617561ca4d7045849 (patch) | |
tree | 04e8f892acba4c43dcb281f5441226d669046e86 /arch/mips/mips-boards/generic | |
parent | f9bba75e378776ee4e97adc0555db16695d341e1 (diff) |
[MIPS] Fix build errors on SEAD
Quick and dirty fix for build errors on SEAD.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mips-boards/generic')
-rw-r--r-- | arch/mips/mips-boards/generic/time.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c index e4604c73f02e..a3c3a1d462b2 100644 --- a/arch/mips/mips-boards/generic/time.c +++ b/arch/mips/mips-boards/generic/time.c | |||
@@ -47,6 +47,9 @@ | |||
47 | #ifdef CONFIG_MIPS_MALTA | 47 | #ifdef CONFIG_MIPS_MALTA |
48 | #include <asm/mips-boards/maltaint.h> | 48 | #include <asm/mips-boards/maltaint.h> |
49 | #endif | 49 | #endif |
50 | #ifdef CONFIG_MIPS_SEAD | ||
51 | #include <asm/mips-boards/seadint.h> | ||
52 | #endif | ||
50 | 53 | ||
51 | unsigned long cpu_khz; | 54 | unsigned long cpu_khz; |
52 | 55 | ||
@@ -263,11 +266,13 @@ void __init mips_time_init(void) | |||
263 | 266 | ||
264 | void __init plat_timer_setup(struct irqaction *irq) | 267 | void __init plat_timer_setup(struct irqaction *irq) |
265 | { | 268 | { |
269 | #ifdef MSC01E_INT_BASE | ||
266 | if (cpu_has_veic) { | 270 | if (cpu_has_veic) { |
267 | set_vi_handler (MSC01E_INT_CPUCTR, mips_timer_dispatch); | 271 | set_vi_handler (MSC01E_INT_CPUCTR, mips_timer_dispatch); |
268 | mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR; | 272 | mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR; |
269 | } | 273 | } else |
270 | else { | 274 | #endif |
275 | { | ||
271 | if (cpu_has_vint) | 276 | if (cpu_has_vint) |
272 | set_vi_handler (MIPSCPU_INT_CPUCTR, mips_timer_dispatch); | 277 | set_vi_handler (MIPSCPU_INT_CPUCTR, mips_timer_dispatch); |
273 | mips_cpu_timer_irq = MIPSCPU_INT_BASE + MIPSCPU_INT_CPUCTR; | 278 | mips_cpu_timer_irq = MIPSCPU_INT_BASE + MIPSCPU_INT_CPUCTR; |