diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2005-08-16 11:44:06 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2005-10-29 14:32:02 -0400 |
commit | 479a0e3e0245fa116412bc105ab1161636c220cb (patch) | |
tree | 3aa73f8d4626f1f29821df184fa9d6df9d08e6d4 /arch/mips/mips-boards/generic | |
parent | fd0197d26208b896caa958cc1780e8016f439711 (diff) |
Support for CoreFPGA-3.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mips-boards/generic')
-rw-r--r-- | arch/mips/mips-boards/generic/init.c | 1 | ||||
-rw-r--r-- | arch/mips/mips-boards/generic/pci.c | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/mips-boards/generic/init.c b/arch/mips/mips-boards/generic/init.c index 58256ea33102..eab5a705e989 100644 --- a/arch/mips/mips-boards/generic/init.c +++ b/arch/mips/mips-boards/generic/init.c | |||
@@ -337,6 +337,7 @@ void __init prom_init(void) | |||
337 | 337 | ||
338 | case MIPS_REVISION_CORID_CORE_MSC: | 338 | case MIPS_REVISION_CORID_CORE_MSC: |
339 | case MIPS_REVISION_CORID_CORE_FPGA2: | 339 | case MIPS_REVISION_CORID_CORE_FPGA2: |
340 | case MIPS_REVISION_CORID_CORE_FPGA3: | ||
340 | case MIPS_REVISION_CORID_CORE_EMUL_MSC: | 341 | case MIPS_REVISION_CORID_CORE_EMUL_MSC: |
341 | _pcictrl_msc = (unsigned long)ioremap(MIPS_MSC01_PCI_REG_BASE, 0x2000); | 342 | _pcictrl_msc = (unsigned long)ioremap(MIPS_MSC01_PCI_REG_BASE, 0x2000); |
342 | 343 | ||
diff --git a/arch/mips/mips-boards/generic/pci.c b/arch/mips/mips-boards/generic/pci.c index c8398c497a21..1f6f9df74ab2 100644 --- a/arch/mips/mips-boards/generic/pci.c +++ b/arch/mips/mips-boards/generic/pci.c | |||
@@ -197,6 +197,7 @@ void __init mips_pcibios_init(void) | |||
197 | 197 | ||
198 | case MIPS_REVISION_CORID_CORE_MSC: | 198 | case MIPS_REVISION_CORID_CORE_MSC: |
199 | case MIPS_REVISION_CORID_CORE_FPGA2: | 199 | case MIPS_REVISION_CORID_CORE_FPGA2: |
200 | case MIPS_REVISION_CORID_CORE_FPGA3: | ||
200 | case MIPS_REVISION_CORID_CORE_EMUL_MSC: | 201 | case MIPS_REVISION_CORID_CORE_EMUL_MSC: |
201 | /* Set up resource ranges from the controller's registers. */ | 202 | /* Set up resource ranges from the controller's registers. */ |
202 | MSC_READ(MSC01_PCI_SC2PMBASL, start); | 203 | MSC_READ(MSC01_PCI_SC2PMBASL, start); |