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authorRalf Baechle <ralf@linux-mips.org>2006-04-03 12:56:36 -0400
committerRalf Baechle <ralf@linux-mips.org>2006-04-18 22:14:21 -0400
commite4ac58afdfac792c0583af30dbd9eae53e24c78b (patch)
tree7517bef2c515fc630e4d3d238867b91cde96f558 /arch/mips/mips-boards/atlas
parentd35d473c25d43d7db3e5e18b66d558d2a631cca8 (diff)
[MIPS] Rewrite all the assembler interrupt handlers to C.
Saves like 1,600 lines of code, is way easier to debug, compilers frequently do a better job than the cut and paste type of handlers many boards had. And finally having all the stuff done in a single place also means alot of bug potencial for the MT ASE is gone. The only surviving handler in assembler is the DECstation one; I hope Maciej will rewrite it. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mips-boards/atlas')
-rw-r--r--arch/mips/mips-boards/atlas/Makefile2
-rw-r--r--arch/mips/mips-boards/atlas/atlas-irq.S120
-rw-r--r--arch/mips/mips-boards/atlas/atlas_int.c92
3 files changed, 87 insertions, 127 deletions
diff --git a/arch/mips/mips-boards/atlas/Makefile b/arch/mips/mips-boards/atlas/Makefile
index 50fec2a5aee6..d8dab75906bf 100644
--- a/arch/mips/mips-boards/atlas/Makefile
+++ b/arch/mips/mips-boards/atlas/Makefile
@@ -16,5 +16,5 @@
16# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 16# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
17# 17#
18 18
19obj-y := atlas_int.o atlas-irq.o atlas_setup.o 19obj-y := atlas_int.o atlas_setup.o
20obj-$(CONFIG_KGDB) += atlas_gdb.o 20obj-$(CONFIG_KGDB) += atlas_gdb.o
diff --git a/arch/mips/mips-boards/atlas/atlas-irq.S b/arch/mips/mips-boards/atlas/atlas-irq.S
deleted file mode 100644
index 31bc99a52383..000000000000
--- a/arch/mips/mips-boards/atlas/atlas-irq.S
+++ /dev/null
@@ -1,120 +0,0 @@
1/*
2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 1999, 2000 MIPS Technologies, Inc. All rights reserved.
4 *
5 * This program is free software; you can distribute it and/or modify it
6 * under the terms of the GNU General Public License (Version 2) as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
17 *
18 * Interrupt exception dispatch code.
19 */
20#include <linux/config.h>
21
22#include <asm/asm.h>
23#include <asm/mipsregs.h>
24#include <asm/regdef.h>
25#include <asm/stackframe.h>
26#include <asm/mips-boards/atlasint.h>
27
28/*
29 * Furthermore, the IRQs on the MIPS board look basically (barring software
30 * IRQs which we don't use at all and all external interrupt sources are
31 * combined together on hardware interrupt 0 (MIPS IRQ 2)) like:
32 *
33 * MIPS IRQ Source
34 * -------- ------
35 * 0 Software (ignored)
36 * 1 Software (ignored)
37 * 2 Combined hardware interrupt (hw0)
38 * 3 Hardware (ignored)
39 * 4 Hardware (ignored)
40 * 5 Hardware (ignored)
41 * 6 Hardware (ignored)
42 * 7 R4k timer (what we use)
43 *
44 * Note: On the SEAD board thing are a little bit different.
45 * Here IRQ 2 (hw0) is wired to the UART0 and IRQ 3 (hw1) is wired
46 * wired to UART1.
47 *
48 * We handle the IRQ according to _our_ priority which is:
49 *
50 * Highest ---- R4k Timer
51 * Lowest ---- Combined hardware interrupt
52 *
53 * then we just return, if multiple IRQs are pending then we will just take
54 * another exception, big deal.
55 */
56
57 .text
58 .set noreorder
59 .set noat
60 .align 5
61 NESTED(mipsIRQ, PT_SIZE, sp)
62 SAVE_ALL
63 CLI
64 .set at
65
66 mfc0 s0, CP0_CAUSE # get irq bits
67 mfc0 s1, CP0_STATUS # get irq mask
68 andi s0, ST0_IM # CAUSE.CE may be non-zero!
69 and s0, s1
70
71#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
72 .set mips32
73 clz a0, s0
74 .set mips0
75 negu a0
76 addu a0, 31-CAUSEB_IP
77 bltz a0, spurious
78#else
79 beqz s0, spurious
80 li a0, 7
81
82 and t0, s0, 0xf000
83 sltiu t0, t0, 1
84 sll t0, 2
85 subu a0, t0
86 sll s0, t0
87
88 and t0, s0, 0xc000
89 sltiu t0, t0, 1
90 sll t0, 1
91 subu a0, t0
92 sll s0, t0
93
94 and t0, s0, 0x8000
95 sltiu t0, t0, 1
96 # sll t0, 0
97 subu a0, t0
98 # sll s0, t0
99#endif
100
101 li a1, MIPSCPU_INT_ATLAS
102 bne a0, a1, 1f
103 addu a0, MIPSCPU_INT_BASE
104
105 jal atlas_hw0_irqdispatch
106 move a0, sp
107
108 j ret_from_irq
109 nop
110
1111: jal do_IRQ
112 move a1, sp
113
114 j ret_from_irq
115 nop
116
117spurious:
118 j spurious_interrupt
119 nop
120 END(mipsIRQ)
diff --git a/arch/mips/mips-boards/atlas/atlas_int.c b/arch/mips/mips-boards/atlas/atlas_int.c
index bc0ebc69bfb3..db53950b7cfb 100644
--- a/arch/mips/mips-boards/atlas/atlas_int.c
+++ b/arch/mips/mips-boards/atlas/atlas_int.c
@@ -39,8 +39,6 @@
39 39
40static struct atlas_ictrl_regs *atlas_hw0_icregs; 40static struct atlas_ictrl_regs *atlas_hw0_icregs;
41 41
42extern asmlinkage void mipsIRQ(void);
43
44#if 0 42#if 0
45#define DEBUG_INT(x...) printk(x) 43#define DEBUG_INT(x...) printk(x)
46#else 44#else
@@ -98,7 +96,7 @@ static inline int ls1bit32(unsigned int x)
98 return b; 96 return b;
99} 97}
100 98
101void atlas_hw0_irqdispatch(struct pt_regs *regs) 99static inline void atlas_hw0_irqdispatch(struct pt_regs *regs)
102{ 100{
103 unsigned long int_status; 101 unsigned long int_status;
104 int irq; 102 int irq;
@@ -116,6 +114,91 @@ void atlas_hw0_irqdispatch(struct pt_regs *regs)
116 do_IRQ(irq, regs); 114 do_IRQ(irq, regs);
117} 115}
118 116
117static inline int clz(unsigned long x)
118{
119 __asm__ (
120 " .set push \n"
121 " .set mips32 \n"
122 " clz %0, %1 \n"
123 " .set pop \n"
124 : "=r" (x)
125 : "r" (x));
126
127 return x;
128}
129
130/*
131 * Version of ffs that only looks at bits 12..15.
132 */
133static inline unsigned int irq_ffs(unsigned int pending)
134{
135#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
136 return -clz(pending) + 31 - CAUSEB_IP;
137#else
138 unsigned int a0 = 7;
139 unsigned int t0;
140
141 t0 = s0 & 0xf000;
142 t0 = t0 < 1;
143 t0 = t0 << 2;
144 a0 = a0 - t0;
145 s0 = s0 << t0;
146
147 t0 = s0 & 0xc000;
148 t0 = t0 < 1;
149 t0 = t0 << 1;
150 a0 = a0 - t0;
151 s0 = s0 << t0;
152
153 t0 = s0 & 0x8000;
154 t0 = t0 < 1;
155 //t0 = t0 << 2;
156 a0 = a0 - t0;
157 //s0 = s0 << t0;
158
159 return a0;
160#endif
161}
162
163/*
164 * IRQs on the Atlas board look basically (barring software IRQs which we
165 * don't use at all and all external interrupt sources are combined together
166 * on hardware interrupt 0 (MIPS IRQ 2)) like:
167 *
168 * MIPS IRQ Source
169 * -------- ------
170 * 0 Software (ignored)
171 * 1 Software (ignored)
172 * 2 Combined hardware interrupt (hw0)
173 * 3 Hardware (ignored)
174 * 4 Hardware (ignored)
175 * 5 Hardware (ignored)
176 * 6 Hardware (ignored)
177 * 7 R4k timer (what we use)
178 *
179 * We handle the IRQ according to _our_ priority which is:
180 *
181 * Highest ---- R4k Timer
182 * Lowest ---- Combined hardware interrupt
183 *
184 * then we just return, if multiple IRQs are pending then we will just take
185 * another exception, big deal.
186 */
187asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
188{
189 unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
190 int irq;
191
192 irq = irq_ffs(pending);
193
194 if (irq == MIPSCPU_INT_ATLAS)
195 atlas_hw0_irqdispatch(regs);
196 else if (irq > 0)
197 do_IRQ(MIPSCPU_INT_BASE + irq, regs);
198 else
199 spurious_interrupt(regs);
200}
201
119void __init arch_init_irq(void) 202void __init arch_init_irq(void)
120{ 203{
121 int i; 204 int i;
@@ -128,9 +211,6 @@ void __init arch_init_irq(void)
128 */ 211 */
129 atlas_hw0_icregs->intrsten = 0xffffffff; 212 atlas_hw0_icregs->intrsten = 0xffffffff;
130 213
131 /* Now safe to set the exception vector. */
132 set_except_vector(0, mipsIRQ);
133
134 for (i = ATLASINT_BASE; i <= ATLASINT_END; i++) { 214 for (i = ATLASINT_BASE; i <= ATLASINT_END; i++) {
135 irq_desc[i].status = IRQ_DISABLED; 215 irq_desc[i].status = IRQ_DISABLED;
136 irq_desc[i].action = 0; 216 irq_desc[i].action = 0;
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-26 09:26:28 -0500