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authorLinus Torvalds <torvalds@linux-foundation.org>2013-03-02 10:44:16 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2013-03-02 10:44:16 -0500
commitaebb2afd5420c860b7fbc3882a323ef1247fbf16 (patch)
tree05ee0efcebca5ec421de44de7a6d6271088c64a8 /arch/mips/math-emu
parent8eae508b7c6ff502a71d0293b69e97c5505d5840 (diff)
parentedb15d83a875a1f4b1576188844db5c330c3267d (diff)
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle: o Add basic support for the Mediatek/Ralink Wireless SoC family. o The Qualcomm Atheros platform is extended by support for the new QCA955X SoC series as well as a bunch of patches that get the code ready for OF support. o Lantiq and BCM47XX platform have a few improvements and bug fixes. o MIPS has sent a few patches that get the kernel ready for the upcoming microMIPS support. o The rest of the series is made up of small bug fixes and cleanups that relate to various parts of the MIPS code. The biggy in there is a whitespace cleanup. After I was sent another set of whitespace cleanup patches I decided it was the time to clean the whitespace "issues" for once and and that touches many files below arch/mips/. Fix up silly conflicts, mostly due to whitespace cleanups. * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (105 commits) MIPS: Quit exporting kernel internel break codes to uapi/asm/break.h MIPS: remove broken conditional inside vpe loader code MIPS: SMTC: fix implicit declaration of set_vi_handler MIPS: early_printk: drop __init annotations MIPS: Probe for and report hardware virtualization support. MIPS: ath79: add support for the Qualcomm Atheros AP136-010 board MIPS: ath79: add USB controller registration code for the QCA955X SoCs MIPS: ath79: add PCI controller registration code for the QCA955X SoCs MIPS: ath79: add WMAC registration code for the QCA955X SoCs MIPS: ath79: register UART for the QCA955X SoCs MIPS: ath79: add QCA955X specific glue to ath79_device_reset_{set, clear} MIPS: ath79: add GPIO setup code for the QCA955X SoCs MIPS: ath79: add IRQ handling code for the QCA955X SoCs MIPS: ath79: add clock setup code for the QCA955X SoCs MIPS: ath79: add SoC detection code for the QCA955X SoCs MIPS: ath79: add early printk support for the QCA955X SoCs MIPS: ath79: fix WMAC IRQ resource assignment mips: reserve elfcorehdr mips: Make sure kernel memory is in iomem MIPS: ath79: use dynamically allocated USB platform devices ...
Diffstat (limited to 'arch/mips/math-emu')
-rw-r--r--arch/mips/math-emu/Makefile1
-rw-r--r--arch/mips/math-emu/cp1emu.c8
-rw-r--r--arch/mips/math-emu/dp_add.c2
-rw-r--r--arch/mips/math-emu/dp_sqrt.c6
-rw-r--r--arch/mips/math-emu/dp_sub.c2
-rw-r--r--arch/mips/math-emu/ieee754.c18
-rw-r--r--arch/mips/math-emu/ieee754dp.c2
-rw-r--r--arch/mips/math-emu/ieee754int.h2
-rw-r--r--arch/mips/math-emu/ieee754sp.c2
-rw-r--r--arch/mips/math-emu/ieee754xcpt.c2
-rw-r--r--arch/mips/math-emu/kernel_linkage.c2
-rw-r--r--arch/mips/math-emu/sp_add.c2
-rw-r--r--arch/mips/math-emu/sp_mul.c4
-rw-r--r--arch/mips/math-emu/sp_sub.c2
14 files changed, 27 insertions, 28 deletions
diff --git a/arch/mips/math-emu/Makefile b/arch/mips/math-emu/Makefile
index 96607230d9ea..121a848a3594 100644
--- a/arch/mips/math-emu/Makefile
+++ b/arch/mips/math-emu/Makefile
@@ -9,4 +9,3 @@ obj-y := cp1emu.o ieee754m.o ieee754d.o ieee754dp.o ieee754sp.o ieee754.o \
9 sp_div.o sp_mul.o sp_sub.o sp_add.o sp_fdp.o sp_cmp.o sp_logb.o \ 9 sp_div.o sp_mul.o sp_sub.o sp_add.o sp_fdp.o sp_cmp.o sp_logb.o \
10 sp_scalb.o sp_simple.o sp_tint.o sp_fint.o sp_tlong.o sp_flong.o \ 10 sp_scalb.o sp_simple.o sp_tint.o sp_fint.o sp_tlong.o sp_flong.o \
11 dp_sqrt.o sp_sqrt.o kernel_linkage.o dsemul.o 11 dp_sqrt.o sp_sqrt.o kernel_linkage.o dsemul.o
12
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index 47c77e7ffbf8..afb5a0bcf7a5 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -169,7 +169,7 @@ static int isBranchInstr(mips_instruction * i)
169 169
170/* 170/*
171 * In the Linux kernel, we support selection of FPR format on the 171 * In the Linux kernel, we support selection of FPR format on the
172 * basis of the Status.FR bit. If an FPU is not present, the FR bit 172 * basis of the Status.FR bit. If an FPU is not present, the FR bit
173 * is hardwired to zero, which would imply a 32-bit FPU even for 173 * is hardwired to zero, which would imply a 32-bit FPU even for
174 * 64-bit CPUs so we rather look at TIF_32BIT_REGS. 174 * 64-bit CPUs so we rather look at TIF_32BIT_REGS.
175 * FPU emu is slow and bulky and optimizing this function offers fairly 175 * FPU emu is slow and bulky and optimizing this function offers fairly
@@ -234,7 +234,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
234 if (xcp->cp0_cause & CAUSEF_BD) { 234 if (xcp->cp0_cause & CAUSEF_BD) {
235 /* 235 /*
236 * The instruction to be emulated is in a branch delay slot 236 * The instruction to be emulated is in a branch delay slot
237 * which means that we have to emulate the branch instruction 237 * which means that we have to emulate the branch instruction
238 * BEFORE we do the cop1 instruction. 238 * BEFORE we do the cop1 instruction.
239 * 239 *
240 * This branch could be a COP1 branch, but in that case we 240 * This branch could be a COP1 branch, but in that case we
@@ -1335,8 +1335,8 @@ int fpu_emulator_cop1Handler(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1335 else { 1335 else {
1336 /* 1336 /*
1337 * The 'ieee754_csr' is an alias of 1337 * The 'ieee754_csr' is an alias of
1338 * ctx->fcr31. No need to copy ctx->fcr31 to 1338 * ctx->fcr31. No need to copy ctx->fcr31 to
1339 * ieee754_csr. But ieee754_csr.rm is ieee 1339 * ieee754_csr. But ieee754_csr.rm is ieee
1340 * library modes. (not mips rounding mode) 1340 * library modes. (not mips rounding mode)
1341 */ 1341 */
1342 /* convert to ieee library modes */ 1342 /* convert to ieee library modes */
diff --git a/arch/mips/math-emu/dp_add.c b/arch/mips/math-emu/dp_add.c
index b422fcad852a..c57c8adc42c4 100644
--- a/arch/mips/math-emu/dp_add.c
+++ b/arch/mips/math-emu/dp_add.c
@@ -153,7 +153,7 @@ ieee754dp ieee754dp_add(ieee754dp x, ieee754dp y)
153 xe = xe; 153 xe = xe;
154 xs = xs; 154 xs = xs;
155 155
156 if (xm >> (DP_MBITS + 1 + 3)) { /* carry out */ 156 if (xm >> (DP_MBITS + 1 + 3)) { /* carry out */
157 xm = XDPSRS1(xm); 157 xm = XDPSRS1(xm);
158 xe++; 158 xe++;
159 } 159 }
diff --git a/arch/mips/math-emu/dp_sqrt.c b/arch/mips/math-emu/dp_sqrt.c
index a2a51b87ae8f..b874d60a942b 100644
--- a/arch/mips/math-emu/dp_sqrt.c
+++ b/arch/mips/math-emu/dp_sqrt.c
@@ -87,7 +87,7 @@ ieee754dp ieee754dp_sqrt(ieee754dp x)
87 if (xe > 512) { /* x > 2**-512? */ 87 if (xe > 512) { /* x > 2**-512? */
88 xe -= 512; /* x = x / 2**512 */ 88 xe -= 512; /* x = x / 2**512 */
89 scalx += 256; 89 scalx += 256;
90 } else if (xe < -512) { /* x < 2**-512? */ 90 } else if (xe < -512) { /* x < 2**-512? */
91 xe += 512; /* x = x * 2**512 */ 91 xe += 512; /* x = x * 2**512 */
92 scalx -= 256; 92 scalx -= 256;
93 } 93 }
@@ -108,13 +108,13 @@ ieee754dp ieee754dp_sqrt(ieee754dp x)
108 y.bits &= 0xffffffff00000000LL; 108 y.bits &= 0xffffffff00000000LL;
109 109
110 /* triple to almost 56 sig. bits: y ~= sqrt(x) to within 1 ulp */ 110 /* triple to almost 56 sig. bits: y ~= sqrt(x) to within 1 ulp */
111 /* t=y*y; z=t; pt[n0]+=0x00100000; t+=z; z=(x-z)*y; */ 111 /* t=y*y; z=t; pt[n0]+=0x00100000; t+=z; z=(x-z)*y; */
112 z = t = ieee754dp_mul(y, y); 112 z = t = ieee754dp_mul(y, y);
113 t.parts.bexp += 0x001; 113 t.parts.bexp += 0x001;
114 t = ieee754dp_add(t, z); 114 t = ieee754dp_add(t, z);
115 z = ieee754dp_mul(ieee754dp_sub(x, z), y); 115 z = ieee754dp_mul(ieee754dp_sub(x, z), y);
116 116
117 /* t=z/(t+x) ; pt[n0]+=0x00100000; y+=t; */ 117 /* t=z/(t+x) ; pt[n0]+=0x00100000; y+=t; */
118 t = ieee754dp_div(z, ieee754dp_add(t, x)); 118 t = ieee754dp_div(z, ieee754dp_add(t, x));
119 t.parts.bexp += 0x001; 119 t.parts.bexp += 0x001;
120 y = ieee754dp_add(y, t); 120 y = ieee754dp_add(y, t);
diff --git a/arch/mips/math-emu/dp_sub.c b/arch/mips/math-emu/dp_sub.c
index 0de098cbc77b..91e0a4b5cbc7 100644
--- a/arch/mips/math-emu/dp_sub.c
+++ b/arch/mips/math-emu/dp_sub.c
@@ -158,7 +158,7 @@ ieee754dp ieee754dp_sub(ieee754dp x, ieee754dp y)
158 xe = xe; 158 xe = xe;
159 xs = xs; 159 xs = xs;
160 160
161 if (xm >> (DP_MBITS + 1 + 3)) { /* carry out */ 161 if (xm >> (DP_MBITS + 1 + 3)) { /* carry out */
162 xm = XDPSRS1(xm); /* shift preserving sticky */ 162 xm = XDPSRS1(xm); /* shift preserving sticky */
163 xe++; 163 xe++;
164 } 164 }
diff --git a/arch/mips/math-emu/ieee754.c b/arch/mips/math-emu/ieee754.c
index 30554e1c67b4..0015cf1989da 100644
--- a/arch/mips/math-emu/ieee754.c
+++ b/arch/mips/math-emu/ieee754.c
@@ -56,21 +56,21 @@
56#endif 56#endif
57 57
58const struct ieee754dp_konst __ieee754dp_spcvals[] = { 58const struct ieee754dp_konst __ieee754dp_spcvals[] = {
59 DPSTR(0, DP_EMIN - 1 + DP_EBIAS, 0, 0), /* + zero */ 59 DPSTR(0, DP_EMIN - 1 + DP_EBIAS, 0, 0), /* + zero */
60 DPSTR(1, DP_EMIN - 1 + DP_EBIAS, 0, 0), /* - zero */ 60 DPSTR(1, DP_EMIN - 1 + DP_EBIAS, 0, 0), /* - zero */
61 DPSTR(0, DP_EBIAS, 0, 0), /* + 1.0 */ 61 DPSTR(0, DP_EBIAS, 0, 0), /* + 1.0 */
62 DPSTR(1, DP_EBIAS, 0, 0), /* - 1.0 */ 62 DPSTR(1, DP_EBIAS, 0, 0), /* - 1.0 */
63 DPSTR(0, 3 + DP_EBIAS, 0x40000, 0), /* + 10.0 */ 63 DPSTR(0, 3 + DP_EBIAS, 0x40000, 0), /* + 10.0 */
64 DPSTR(1, 3 + DP_EBIAS, 0x40000, 0), /* - 10.0 */ 64 DPSTR(1, 3 + DP_EBIAS, 0x40000, 0), /* - 10.0 */
65 DPSTR(0, DP_EMAX + 1 + DP_EBIAS, 0, 0), /* + infinity */ 65 DPSTR(0, DP_EMAX + 1 + DP_EBIAS, 0, 0), /* + infinity */
66 DPSTR(1, DP_EMAX + 1 + DP_EBIAS, 0, 0), /* - infinity */ 66 DPSTR(1, DP_EMAX + 1 + DP_EBIAS, 0, 0), /* - infinity */
67 DPSTR(0, DP_EMAX+1+DP_EBIAS, 0x7FFFF, 0xFFFFFFFF), /* + indef quiet Nan */ 67 DPSTR(0, DP_EMAX+1+DP_EBIAS, 0x7FFFF, 0xFFFFFFFF), /* + indef quiet Nan */
68 DPSTR(0, DP_EMAX + DP_EBIAS, 0xFFFFF, 0xFFFFFFFF), /* + max */ 68 DPSTR(0, DP_EMAX + DP_EBIAS, 0xFFFFF, 0xFFFFFFFF), /* + max */
69 DPSTR(1, DP_EMAX + DP_EBIAS, 0xFFFFF, 0xFFFFFFFF), /* - max */ 69 DPSTR(1, DP_EMAX + DP_EBIAS, 0xFFFFF, 0xFFFFFFFF), /* - max */
70 DPSTR(0, DP_EMIN + DP_EBIAS, 0, 0), /* + min normal */ 70 DPSTR(0, DP_EMIN + DP_EBIAS, 0, 0), /* + min normal */
71 DPSTR(1, DP_EMIN + DP_EBIAS, 0, 0), /* - min normal */ 71 DPSTR(1, DP_EMIN + DP_EBIAS, 0, 0), /* - min normal */
72 DPSTR(0, DP_EMIN - 1 + DP_EBIAS, 0, 1), /* + min denormal */ 72 DPSTR(0, DP_EMIN - 1 + DP_EBIAS, 0, 1), /* + min denormal */
73 DPSTR(1, DP_EMIN - 1 + DP_EBIAS, 0, 1), /* - min denormal */ 73 DPSTR(1, DP_EMIN - 1 + DP_EBIAS, 0, 1), /* - min denormal */
74 DPSTR(0, 31 + DP_EBIAS, 0, 0), /* + 1.0e31 */ 74 DPSTR(0, 31 + DP_EBIAS, 0, 0), /* + 1.0e31 */
75 DPSTR(0, 63 + DP_EBIAS, 0, 0), /* + 1.0e63 */ 75 DPSTR(0, 63 + DP_EBIAS, 0, 0), /* + 1.0e63 */
76}; 76};
@@ -84,9 +84,9 @@ const struct ieee754sp_konst __ieee754sp_spcvals[] = {
84 SPSTR(1, 3 + SP_EBIAS, 0x200000), /* - 10.0 */ 84 SPSTR(1, 3 + SP_EBIAS, 0x200000), /* - 10.0 */
85 SPSTR(0, SP_EMAX + 1 + SP_EBIAS, 0), /* + infinity */ 85 SPSTR(0, SP_EMAX + 1 + SP_EBIAS, 0), /* + infinity */
86 SPSTR(1, SP_EMAX + 1 + SP_EBIAS, 0), /* - infinity */ 86 SPSTR(1, SP_EMAX + 1 + SP_EBIAS, 0), /* - infinity */
87 SPSTR(0, SP_EMAX+1+SP_EBIAS, 0x3FFFFF), /* + indef quiet Nan */ 87 SPSTR(0, SP_EMAX+1+SP_EBIAS, 0x3FFFFF), /* + indef quiet Nan */
88 SPSTR(0, SP_EMAX + SP_EBIAS, 0x7FFFFF), /* + max normal */ 88 SPSTR(0, SP_EMAX + SP_EBIAS, 0x7FFFFF), /* + max normal */
89 SPSTR(1, SP_EMAX + SP_EBIAS, 0x7FFFFF), /* - max normal */ 89 SPSTR(1, SP_EMAX + SP_EBIAS, 0x7FFFFF), /* - max normal */
90 SPSTR(0, SP_EMIN + SP_EBIAS, 0), /* + min normal */ 90 SPSTR(0, SP_EMIN + SP_EBIAS, 0), /* + min normal */
91 SPSTR(1, SP_EMIN + SP_EBIAS, 0), /* - min normal */ 91 SPSTR(1, SP_EMIN + SP_EBIAS, 0), /* - min normal */
92 SPSTR(0, SP_EMIN - 1 + SP_EBIAS, 1), /* + min denormal */ 92 SPSTR(0, SP_EMIN - 1 + SP_EBIAS, 1), /* + min denormal */
diff --git a/arch/mips/math-emu/ieee754dp.c b/arch/mips/math-emu/ieee754dp.c
index 080b5ca03fc6..068e56be8de9 100644
--- a/arch/mips/math-emu/ieee754dp.c
+++ b/arch/mips/math-emu/ieee754dp.c
@@ -116,7 +116,7 @@ static u64 get_rounding(int sn, u64 xm)
116 xm += 0x8; 116 xm += 0x8;
117 break; 117 break;
118 case IEEE754_RD: /* toward -Infinity */ 118 case IEEE754_RD: /* toward -Infinity */
119 if (sn) /* ?? */ 119 if (sn) /* ?? */
120 xm += 0x8; 120 xm += 0x8;
121 break; 121 break;
122 } 122 }
diff --git a/arch/mips/math-emu/ieee754int.h b/arch/mips/math-emu/ieee754int.h
index 2a7d43f4f161..4b6c6fb35304 100644
--- a/arch/mips/math-emu/ieee754int.h
+++ b/arch/mips/math-emu/ieee754int.h
@@ -56,7 +56,7 @@
56 56
57#define CLPAIR(x, y) ((x)*6+(y)) 57#define CLPAIR(x, y) ((x)*6+(y))
58 58
59#define CLEARCX \ 59#define CLEARCX \
60 (ieee754_csr.cx = 0) 60 (ieee754_csr.cx = 0)
61 61
62#define SETCX(x) \ 62#define SETCX(x) \
diff --git a/arch/mips/math-emu/ieee754sp.c b/arch/mips/math-emu/ieee754sp.c
index 271d00d6113a..15d1e36cfe64 100644
--- a/arch/mips/math-emu/ieee754sp.c
+++ b/arch/mips/math-emu/ieee754sp.c
@@ -117,7 +117,7 @@ static unsigned get_rounding(int sn, unsigned xm)
117 xm += 0x8; 117 xm += 0x8;
118 break; 118 break;
119 case IEEE754_RD: /* toward -Infinity */ 119 case IEEE754_RD: /* toward -Infinity */
120 if (sn) /* ?? */ 120 if (sn) /* ?? */
121 xm += 0x8; 121 xm += 0x8;
122 break; 122 break;
123 } 123 }
diff --git a/arch/mips/math-emu/ieee754xcpt.c b/arch/mips/math-emu/ieee754xcpt.c
index b99a693c05af..967167116ae8 100644
--- a/arch/mips/math-emu/ieee754xcpt.c
+++ b/arch/mips/math-emu/ieee754xcpt.c
@@ -25,7 +25,7 @@
25 * Added preprocessor hacks to map to Linux kernel diagnostics. 25 * Added preprocessor hacks to map to Linux kernel diagnostics.
26 * 26 *
27 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com 27 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
28 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. 28 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
29 *************************************************************************/ 29 *************************************************************************/
30 30
31#include <linux/kernel.h> 31#include <linux/kernel.h>
diff --git a/arch/mips/math-emu/kernel_linkage.c b/arch/mips/math-emu/kernel_linkage.c
index 52e6c58c8de1..1c586575fe17 100644
--- a/arch/mips/math-emu/kernel_linkage.c
+++ b/arch/mips/math-emu/kernel_linkage.c
@@ -1,6 +1,6 @@
1/* 1/*
2 * Kevin D. Kissell, kevink@mips and Carsten Langgaard, carstenl@mips.com 2 * Kevin D. Kissell, kevink@mips and Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. 3 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
4 * 4 *
5 * This program is free software; you can distribute it and/or modify it 5 * This program is free software; you can distribute it and/or modify it
6 * under the terms of the GNU General Public License (Version 2) as 6 * under the terms of the GNU General Public License (Version 2) as
diff --git a/arch/mips/math-emu/sp_add.c b/arch/mips/math-emu/sp_add.c
index ae1a327ccac0..c446e64637e2 100644
--- a/arch/mips/math-emu/sp_add.c
+++ b/arch/mips/math-emu/sp_add.c
@@ -148,7 +148,7 @@ ieee754sp ieee754sp_add(ieee754sp x, ieee754sp y)
148 xe = xe; 148 xe = xe;
149 xs = xs; 149 xs = xs;
150 150
151 if (xm >> (SP_MBITS + 1 + 3)) { /* carry out */ 151 if (xm >> (SP_MBITS + 1 + 3)) { /* carry out */
152 SPXSRSX1(); 152 SPXSRSX1();
153 } 153 }
154 } else { 154 } else {
diff --git a/arch/mips/math-emu/sp_mul.c b/arch/mips/math-emu/sp_mul.c
index 2722a2570ea4..fa4675cf2aad 100644
--- a/arch/mips/math-emu/sp_mul.c
+++ b/arch/mips/math-emu/sp_mul.c
@@ -131,7 +131,7 @@ ieee754sp ieee754sp_mul(ieee754sp x, ieee754sp y)
131 hrm = hxm * hym; /* 16 * 16 => 32 */ 131 hrm = hxm * hym; /* 16 * 16 => 32 */
132 132
133 { 133 {
134 unsigned t = lxm * hym; /* 16 * 16 => 32 */ 134 unsigned t = lxm * hym; /* 16 * 16 => 32 */
135 { 135 {
136 unsigned at = lrm + (t << 16); 136 unsigned at = lrm + (t << 16);
137 hrm += at < lrm; 137 hrm += at < lrm;
@@ -141,7 +141,7 @@ ieee754sp ieee754sp_mul(ieee754sp x, ieee754sp y)
141 } 141 }
142 142
143 { 143 {
144 unsigned t = hxm * lym; /* 16 * 16 => 32 */ 144 unsigned t = hxm * lym; /* 16 * 16 => 32 */
145 { 145 {
146 unsigned at = lrm + (t << 16); 146 unsigned at = lrm + (t << 16);
147 hrm += at < lrm; 147 hrm += at < lrm;
diff --git a/arch/mips/math-emu/sp_sub.c b/arch/mips/math-emu/sp_sub.c
index 886ed5bcfefb..e595c6f3d0bb 100644
--- a/arch/mips/math-emu/sp_sub.c
+++ b/arch/mips/math-emu/sp_sub.c
@@ -153,7 +153,7 @@ ieee754sp ieee754sp_sub(ieee754sp x, ieee754sp y)
153 xe = xe; 153 xe = xe;
154 xs = xs; 154 xs = xs;
155 155
156 if (xm >> (SP_MBITS + 1 + 3)) { /* carry out */ 156 if (xm >> (SP_MBITS + 1 + 3)) { /* carry out */
157 SPXSRSX1(); /* shift preserving sticky */ 157 SPXSRSX1(); /* shift preserving sticky */
158 } 158 }
159 } else { 159 } else {