MIPS: Emulate the new MIPS R6 BNEZC and JIALC instructions

MIPS R6 uses the <R6 sdc2 opcode for the new BNEZC and JIALC instructions

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>

1 files changed, 9 insertions, 0 deletions

diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index f00af84f017d..6e7920b20822 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -686,6 +686,15 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
                         dec_insn.next_pc_inc;
 
                 return 1;
+        case bnezcjialc_op:
+                if (!cpu_has_mips_r6)
+                        break;
+                if (!insn.i_format.rs)
+                        regs->regs[31] = regs->cp0_epc + 4;
+                *contpc = regs->cp0_epc + dec_insn.pc_inc +
+                        dec_insn.next_pc_inc;
+
+                return 1;
 #endif
         case cop0_op:
         case cop1_op: