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authorRalf Baechle <ralf@linux-mips.org>2005-04-28 09:39:10 -0400
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 14:31:12 -0400
commitcd21dfcfbb5c43de54f6be795dde07397da2bc2f (patch)
treeed3a6c46fd6aabac95c99b1e816493fcb5f788f8 /arch/mips/math-emu
parent63b2d2f4d2073ac3452ce977d27cc81eabaa61a3 (diff)
Fix preemption and SMP problems in the FP emulator code.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/math-emu')
-rw-r--r--arch/mips/math-emu/cp1emu.c41
-rw-r--r--arch/mips/math-emu/dp_sqrt.c2
-rw-r--r--arch/mips/math-emu/ieee754.c4
-rw-r--r--arch/mips/math-emu/ieee754.h175
4 files changed, 105 insertions, 117 deletions
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index c70f25f5889e..6fed6ce43c4e 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -79,7 +79,17 @@ struct mips_fpu_emulator_private fpuemuprivate;
79 79
80/* Convert Mips rounding mode (0..3) to IEEE library modes. */ 80/* Convert Mips rounding mode (0..3) to IEEE library modes. */
81static const unsigned char ieee_rm[4] = { 81static const unsigned char ieee_rm[4] = {
82 IEEE754_RN, IEEE754_RZ, IEEE754_RU, IEEE754_RD 82 [FPU_CSR_RN] = IEEE754_RN,
83 [FPU_CSR_RZ] = IEEE754_RZ,
84 [FPU_CSR_RU] = IEEE754_RU,
85 [FPU_CSR_RD] = IEEE754_RD,
86};
87/* Convert IEEE library modes to Mips rounding mode (0..3). */
88static const unsigned char mips_rm[4] = {
89 [IEEE754_RN] = FPU_CSR_RN,
90 [IEEE754_RZ] = FPU_CSR_RZ,
91 [IEEE754_RD] = FPU_CSR_RD,
92 [IEEE754_RU] = FPU_CSR_RU,
83}; 93};
84 94
85#if __mips >= 4 95#if __mips >= 4
@@ -368,6 +378,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
368 } 378 }
369 if (MIPSInst_RD(ir) == FPCREG_CSR) { 379 if (MIPSInst_RD(ir) == FPCREG_CSR) {
370 value = ctx->fcr31; 380 value = ctx->fcr31;
381 value = (value & ~0x3) | mips_rm[value & 0x3];
371#ifdef CSRTRACE 382#ifdef CSRTRACE
372 printk("%p gpr[%d]<-csr=%08x\n", 383 printk("%p gpr[%d]<-csr=%08x\n",
373 (void *) (xcp->cp0_epc), 384 (void *) (xcp->cp0_epc),
@@ -400,11 +411,10 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
400 (void *) (xcp->cp0_epc), 411 (void *) (xcp->cp0_epc),
401 MIPSInst_RT(ir), value); 412 MIPSInst_RT(ir), value);
402#endif 413#endif
403 ctx->fcr31 = value; 414 value &= (FPU_CSR_FLUSH | FPU_CSR_ALL_E | FPU_CSR_ALL_S | 0x03);
404 /* copy new rounding mode and 415 ctx->fcr31 &= ~(FPU_CSR_FLUSH | FPU_CSR_ALL_E | FPU_CSR_ALL_S | 0x03);
405 flush bit to ieee library state! */ 416 /* convert to ieee library modes */
406 ieee754_csr.nod = (ctx->fcr31 & 0x1000000) != 0; 417 ctx->fcr31 |= (value & ~0x3) | ieee_rm[value & 0x3];
407 ieee754_csr.rm = ieee_rm[value & 0x3];
408 } 418 }
409 if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) { 419 if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) {
410 return SIGFPE; 420 return SIGFPE;
@@ -570,7 +580,7 @@ static const unsigned char cmptab[8] = {
570static ieee754##p fpemu_##p##_##name (ieee754##p r, ieee754##p s, \ 580static ieee754##p fpemu_##p##_##name (ieee754##p r, ieee754##p s, \
571 ieee754##p t) \ 581 ieee754##p t) \
572{ \ 582{ \
573 struct ieee754_csr ieee754_csr_save; \ 583 struct _ieee754_csr ieee754_csr_save; \
574 s = f1 (s, t); \ 584 s = f1 (s, t); \
575 ieee754_csr_save = ieee754_csr; \ 585 ieee754_csr_save = ieee754_csr; \
576 s = f2 (s, r); \ 586 s = f2 (s, r); \
@@ -699,8 +709,6 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
699 rcsr |= FPU_CSR_INV_X | FPU_CSR_INV_S; 709 rcsr |= FPU_CSR_INV_X | FPU_CSR_INV_S;
700 710
701 ctx->fcr31 = (ctx->fcr31 & ~FPU_CSR_ALL_X) | rcsr; 711 ctx->fcr31 = (ctx->fcr31 & ~FPU_CSR_ALL_X) | rcsr;
702 if (ieee754_csr.nod)
703 ctx->fcr31 |= 0x1000000;
704 if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) { 712 if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) {
705 /*printk ("SIGFPE: fpu csr = %08x\n", 713 /*printk ("SIGFPE: fpu csr = %08x\n",
706 ctx->fcr31); */ 714 ctx->fcr31); */
@@ -1297,12 +1305,17 @@ int fpu_emulator_cop1Handler(int xcptno, struct pt_regs *xcp,
1297 if (insn == 0) 1305 if (insn == 0)
1298 xcp->cp0_epc += 4; /* skip nops */ 1306 xcp->cp0_epc += 4; /* skip nops */
1299 else { 1307 else {
1300 /* Update ieee754_csr. Only relevant if we have a 1308 /*
1301 h/w FPU */ 1309 * The 'ieee754_csr' is an alias of
1302 ieee754_csr.nod = (ctx->fcr31 & 0x1000000) != 0; 1310 * ctx->fcr31. No need to copy ctx->fcr31 to
1303 ieee754_csr.rm = ieee_rm[ctx->fcr31 & 0x3]; 1311 * ieee754_csr. But ieee754_csr.rm is ieee
1304 ieee754_csr.cx = (ctx->fcr31 >> 12) & 0x1f; 1312 * library modes. (not mips rounding mode)
1313 */
1314 /* convert to ieee library modes */
1315 ieee754_csr.rm = ieee_rm[ieee754_csr.rm];
1305 sig = cop1Emulate(xcp, ctx); 1316 sig = cop1Emulate(xcp, ctx);
1317 /* revert to mips rounding mode */
1318 ieee754_csr.rm = mips_rm[ieee754_csr.rm];
1306 } 1319 }
1307 1320
1308 if (cpu_has_fpu) 1321 if (cpu_has_fpu)
diff --git a/arch/mips/math-emu/dp_sqrt.c b/arch/mips/math-emu/dp_sqrt.c
index c35e871ae975..032328c49888 100644
--- a/arch/mips/math-emu/dp_sqrt.c
+++ b/arch/mips/math-emu/dp_sqrt.c
@@ -37,7 +37,7 @@ static const unsigned table[] = {
37 37
38ieee754dp ieee754dp_sqrt(ieee754dp x) 38ieee754dp ieee754dp_sqrt(ieee754dp x)
39{ 39{
40 struct ieee754_csr oldcsr; 40 struct _ieee754_csr oldcsr;
41 ieee754dp y, z, t; 41 ieee754dp y, z, t;
42 unsigned scalx, yh; 42 unsigned scalx, yh;
43 COMPXDP; 43 COMPXDP;
diff --git a/arch/mips/math-emu/ieee754.c b/arch/mips/math-emu/ieee754.c
index f0a364adbf34..97a752fc3049 100644
--- a/arch/mips/math-emu/ieee754.c
+++ b/arch/mips/math-emu/ieee754.c
@@ -50,10 +50,6 @@ const char *const ieee754_cname[] = {
50 "SNaN", 50 "SNaN",
51}; 51};
52 52
53/* the control status register
54*/
55struct ieee754_csr ieee754_csr;
56
57/* special constants 53/* special constants
58*/ 54*/
59 55
diff --git a/arch/mips/math-emu/ieee754.h b/arch/mips/math-emu/ieee754.h
index b8772f46972d..5689b0cf0185 100644
--- a/arch/mips/math-emu/ieee754.h
+++ b/arch/mips/math-emu/ieee754.h
@@ -1,13 +1,8 @@
1/* single and double precision fp ops
2 * missing extended precision.
3*/
4/* 1/*
5 * MIPS floating point support 2 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd. 3 * Copyright (C) 1994-2000 Algorithmics Ltd.
7 * http://www.algor.co.uk 4 * http://www.algor.co.uk
8 * 5 *
9 * ########################################################################
10 *
11 * This program is free software; you can distribute it and/or modify it 6 * This program is free software; you can distribute it and/or modify it
12 * under the terms of the GNU General Public License (Version 2) as 7 * under the terms of the GNU General Public License (Version 2) as
13 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
@@ -21,20 +16,16 @@
21 * with this program; if not, write to the Free Software Foundation, Inc., 16 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 17 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
23 * 18 *
24 * ########################################################################
25 */
26
27/**************************************************************************
28 * Nov 7, 2000 19 * Nov 7, 2000
29 * Modification to allow integration with Linux kernel 20 * Modification to allow integration with Linux kernel
30 * 21 *
31 * Kevin D. Kissell, kevink@mips.com and Carsten Langgard, carstenl@mips.com 22 * Kevin D. Kissell, kevink@mips.com and Carsten Langgard, carstenl@mips.com
32 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. 23 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
33 *************************************************************************/ 24 */
34 25
35#ifdef __KERNEL__ 26#include <asm/byteorder.h>
36/* Going from Algorithmics to Linux native environment, add this */
37#include <linux/types.h> 27#include <linux/types.h>
28#include <linux/sched.h>
38 29
39/* 30/*
40 * Not very pretty, but the Linux kernel's normal va_list definition 31 * Not very pretty, but the Linux kernel's normal va_list definition
@@ -44,18 +35,7 @@
44#include <stdarg.h> 35#include <stdarg.h>
45#endif 36#endif
46 37
47#else 38#ifdef __LITTLE_ENDIAN
48
49/* Note that __KERNEL__ is taken to mean Linux kernel */
50
51#if #system(OpenBSD)
52#include <machine/types.h>
53#endif
54#include <machine/endian.h>
55
56#endif /* __KERNEL__ */
57
58#if (defined(BYTE_ORDER) && BYTE_ORDER == LITTLE_ENDIAN) || defined(__MIPSEL__)
59struct ieee754dp_konst { 39struct ieee754dp_konst {
60 unsigned mantlo:32; 40 unsigned mantlo:32;
61 unsigned manthi:20; 41 unsigned manthi:20;
@@ -86,13 +66,14 @@ typedef union _ieee754sp {
86} ieee754sp; 66} ieee754sp;
87#endif 67#endif
88 68
89#if (defined(BYTE_ORDER) && BYTE_ORDER == BIG_ENDIAN) || defined(__MIPSEB__) 69#ifdef __BIG_ENDIAN
90struct ieee754dp_konst { 70struct ieee754dp_konst {
91 unsigned sign:1; 71 unsigned sign:1;
92 unsigned bexp:11; 72 unsigned bexp:11;
93 unsigned manthi:20; 73 unsigned manthi:20;
94 unsigned mantlo:32; 74 unsigned mantlo:32;
95}; 75};
76
96typedef union _ieee754dp { 77typedef union _ieee754dp {
97 struct ieee754dp_konst oparts; 78 struct ieee754dp_konst oparts;
98 struct { 79 struct {
@@ -251,93 +232,109 @@ extern const char *const ieee754_cname[];
251 232
252/* "normal" comparisons 233/* "normal" comparisons
253*/ 234*/
254static __inline int ieee754sp_eq(ieee754sp x, ieee754sp y) 235static inline int ieee754sp_eq(ieee754sp x, ieee754sp y)
255{ 236{
256 return ieee754sp_cmp(x, y, IEEE754_CEQ, 0); 237 return ieee754sp_cmp(x, y, IEEE754_CEQ, 0);
257} 238}
258 239
259static __inline int ieee754sp_ne(ieee754sp x, ieee754sp y) 240static inline int ieee754sp_ne(ieee754sp x, ieee754sp y)
260{ 241{
261 return ieee754sp_cmp(x, y, 242 return ieee754sp_cmp(x, y,
262 IEEE754_CLT | IEEE754_CGT | IEEE754_CUN, 0); 243 IEEE754_CLT | IEEE754_CGT | IEEE754_CUN, 0);
263} 244}
264 245
265static __inline int ieee754sp_lt(ieee754sp x, ieee754sp y) 246static inline int ieee754sp_lt(ieee754sp x, ieee754sp y)
266{ 247{
267 return ieee754sp_cmp(x, y, IEEE754_CLT, 0); 248 return ieee754sp_cmp(x, y, IEEE754_CLT, 0);
268} 249}
269 250
270static __inline int ieee754sp_le(ieee754sp x, ieee754sp y) 251static inline int ieee754sp_le(ieee754sp x, ieee754sp y)
271{ 252{
272 return ieee754sp_cmp(x, y, IEEE754_CLT | IEEE754_CEQ, 0); 253 return ieee754sp_cmp(x, y, IEEE754_CLT | IEEE754_CEQ, 0);
273} 254}
274 255
275static __inline int ieee754sp_gt(ieee754sp x, ieee754sp y) 256static inline int ieee754sp_gt(ieee754sp x, ieee754sp y)
276{ 257{
277 return ieee754sp_cmp(x, y, IEEE754_CGT, 0); 258 return ieee754sp_cmp(x, y, IEEE754_CGT, 0);
278} 259}
279 260
280 261
281static __inline int ieee754sp_ge(ieee754sp x, ieee754sp y) 262static inline int ieee754sp_ge(ieee754sp x, ieee754sp y)
282{ 263{
283 return ieee754sp_cmp(x, y, IEEE754_CGT | IEEE754_CEQ, 0); 264 return ieee754sp_cmp(x, y, IEEE754_CGT | IEEE754_CEQ, 0);
284} 265}
285 266
286static __inline int ieee754dp_eq(ieee754dp x, ieee754dp y) 267static inline int ieee754dp_eq(ieee754dp x, ieee754dp y)
287{ 268{
288 return ieee754dp_cmp(x, y, IEEE754_CEQ, 0); 269 return ieee754dp_cmp(x, y, IEEE754_CEQ, 0);
289} 270}
290 271
291static __inline int ieee754dp_ne(ieee754dp x, ieee754dp y) 272static inline int ieee754dp_ne(ieee754dp x, ieee754dp y)
292{ 273{
293 return ieee754dp_cmp(x, y, 274 return ieee754dp_cmp(x, y,
294 IEEE754_CLT | IEEE754_CGT | IEEE754_CUN, 0); 275 IEEE754_CLT | IEEE754_CGT | IEEE754_CUN, 0);
295} 276}
296 277
297static __inline int ieee754dp_lt(ieee754dp x, ieee754dp y) 278static inline int ieee754dp_lt(ieee754dp x, ieee754dp y)
298{ 279{
299 return ieee754dp_cmp(x, y, IEEE754_CLT, 0); 280 return ieee754dp_cmp(x, y, IEEE754_CLT, 0);
300} 281}
301 282
302static __inline int ieee754dp_le(ieee754dp x, ieee754dp y) 283static inline int ieee754dp_le(ieee754dp x, ieee754dp y)
303{ 284{
304 return ieee754dp_cmp(x, y, IEEE754_CLT | IEEE754_CEQ, 0); 285 return ieee754dp_cmp(x, y, IEEE754_CLT | IEEE754_CEQ, 0);
305} 286}
306 287
307static __inline int ieee754dp_gt(ieee754dp x, ieee754dp y) 288static inline int ieee754dp_gt(ieee754dp x, ieee754dp y)
308{ 289{
309 return ieee754dp_cmp(x, y, IEEE754_CGT, 0); 290 return ieee754dp_cmp(x, y, IEEE754_CGT, 0);
310} 291}
311 292
312static __inline int ieee754dp_ge(ieee754dp x, ieee754dp y) 293static inline int ieee754dp_ge(ieee754dp x, ieee754dp y)
313{ 294{
314 return ieee754dp_cmp(x, y, IEEE754_CGT | IEEE754_CEQ, 0); 295 return ieee754dp_cmp(x, y, IEEE754_CGT | IEEE754_CEQ, 0);
315} 296}
316 297
317 298
318/* like strtod 299/*
319*/ 300 * Like strtod
301 */
320ieee754dp ieee754dp_fstr(const char *s, char **endp); 302ieee754dp ieee754dp_fstr(const char *s, char **endp);
321char *ieee754dp_tstr(ieee754dp x, int prec, int fmt, int af); 303char *ieee754dp_tstr(ieee754dp x, int prec, int fmt, int af);
322 304
323 305
324/* the control status register 306/*
325*/ 307 * The control status register
326struct ieee754_csr { 308 */
327 unsigned pad:13; 309struct _ieee754_csr {
310#ifdef __BIG_ENDIAN
311 unsigned pad0:7;
328 unsigned nod:1; /* set 1 for no denormalised numbers */ 312 unsigned nod:1; /* set 1 for no denormalised numbers */
329 unsigned cx:5; /* exceptions this operation */ 313 unsigned c:1; /* condition */
314 unsigned pad1:5;
315 unsigned cx:6; /* exceptions this operation */
330 unsigned mx:5; /* exception enable mask */ 316 unsigned mx:5; /* exception enable mask */
331 unsigned sx:5; /* exceptions total */ 317 unsigned sx:5; /* exceptions total */
332 unsigned rm:2; /* current rounding mode */ 318 unsigned rm:2; /* current rounding mode */
319#endif
320#ifdef __LITTLE_ENDIAN
321 unsigned rm:2; /* current rounding mode */
322 unsigned sx:5; /* exceptions total */
323 unsigned mx:5; /* exception enable mask */
324 unsigned cx:6; /* exceptions this operation */
325 unsigned pad1:5;
326 unsigned c:1; /* condition */
327 unsigned nod:1; /* set 1 for no denormalised numbers */
328 unsigned pad0:7;
329#endif
333}; 330};
334extern struct ieee754_csr ieee754_csr; 331#define ieee754_csr (*(struct _ieee754_csr *)(&current->thread.fpu.soft.fcr31))
335 332
336static __inline unsigned ieee754_getrm(void) 333static inline unsigned ieee754_getrm(void)
337{ 334{
338 return (ieee754_csr.rm); 335 return (ieee754_csr.rm);
339} 336}
340static __inline unsigned ieee754_setrm(unsigned rm) 337static inline unsigned ieee754_setrm(unsigned rm)
341{ 338{
342 return (ieee754_csr.rm = rm); 339 return (ieee754_csr.rm = rm);
343} 340}
@@ -345,14 +342,14 @@ static __inline unsigned ieee754_setrm(unsigned rm)
345/* 342/*
346 * get current exceptions 343 * get current exceptions
347 */ 344 */
348static __inline unsigned ieee754_getcx(void) 345static inline unsigned ieee754_getcx(void)
349{ 346{
350 return (ieee754_csr.cx); 347 return (ieee754_csr.cx);
351} 348}
352 349
353/* test for current exception condition 350/* test for current exception condition
354 */ 351 */
355static __inline int ieee754_cxtest(unsigned n) 352static inline int ieee754_cxtest(unsigned n)
356{ 353{
357 return (ieee754_csr.cx & n); 354 return (ieee754_csr.cx & n);
358} 355}
@@ -360,21 +357,21 @@ static __inline int ieee754_cxtest(unsigned n)
360/* 357/*
361 * get sticky exceptions 358 * get sticky exceptions
362 */ 359 */
363static __inline unsigned ieee754_getsx(void) 360static inline unsigned ieee754_getsx(void)
364{ 361{
365 return (ieee754_csr.sx); 362 return (ieee754_csr.sx);
366} 363}
367 364
368/* clear sticky conditions 365/* clear sticky conditions
369*/ 366*/
370static __inline unsigned ieee754_clrsx(void) 367static inline unsigned ieee754_clrsx(void)
371{ 368{
372 return (ieee754_csr.sx = 0); 369 return (ieee754_csr.sx = 0);
373} 370}
374 371
375/* test for sticky exception condition 372/* test for sticky exception condition
376 */ 373 */
377static __inline int ieee754_sxtest(unsigned n) 374static inline int ieee754_sxtest(unsigned n)
378{ 375{
379 return (ieee754_csr.sx & n); 376 return (ieee754_csr.sx & n);
380} 377}
@@ -406,52 +403,34 @@ extern const struct ieee754sp_konst __ieee754sp_spcvals[];
406#define ieee754dp_spcvals ((const ieee754dp *)__ieee754dp_spcvals) 403#define ieee754dp_spcvals ((const ieee754dp *)__ieee754dp_spcvals)
407#define ieee754sp_spcvals ((const ieee754sp *)__ieee754sp_spcvals) 404#define ieee754sp_spcvals ((const ieee754sp *)__ieee754sp_spcvals)
408 405
409/* return infinity with given sign 406/*
410*/ 407 * Return infinity with given sign
411#define ieee754dp_inf(sn) \ 408 */
412 (ieee754dp_spcvals[IEEE754_SPCVAL_PINFINITY+(sn)]) 409#define ieee754dp_inf(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PINFINITY+(sn)])
413#define ieee754dp_zero(sn) \ 410#define ieee754dp_zero(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PZERO+(sn)])
414 (ieee754dp_spcvals[IEEE754_SPCVAL_PZERO+(sn)]) 411#define ieee754dp_one(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PONE+(sn)])
415#define ieee754dp_one(sn) \ 412#define ieee754dp_ten(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PTEN+(sn)])
416 (ieee754dp_spcvals[IEEE754_SPCVAL_PONE+(sn)]) 413#define ieee754dp_indef() (ieee754dp_spcvals[IEEE754_SPCVAL_INDEF])
417#define ieee754dp_ten(sn) \ 414#define ieee754dp_max(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PMAX+(sn)])
418 (ieee754dp_spcvals[IEEE754_SPCVAL_PTEN+(sn)]) 415#define ieee754dp_min(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PMIN+(sn)])
419#define ieee754dp_indef() \ 416#define ieee754dp_mind(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PMIND+(sn)])
420 (ieee754dp_spcvals[IEEE754_SPCVAL_INDEF]) 417#define ieee754dp_1e31() (ieee754dp_spcvals[IEEE754_SPCVAL_P1E31])
421#define ieee754dp_max(sn) \ 418#define ieee754dp_1e63() (ieee754dp_spcvals[IEEE754_SPCVAL_P1E63])
422 (ieee754dp_spcvals[IEEE754_SPCVAL_PMAX+(sn)]) 419
423#define ieee754dp_min(sn) \ 420#define ieee754sp_inf(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PINFINITY+(sn)])
424 (ieee754dp_spcvals[IEEE754_SPCVAL_PMIN+(sn)]) 421#define ieee754sp_zero(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PZERO+(sn)])
425#define ieee754dp_mind(sn) \ 422#define ieee754sp_one(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PONE+(sn)])
426 (ieee754dp_spcvals[IEEE754_SPCVAL_PMIND+(sn)]) 423#define ieee754sp_ten(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PTEN+(sn)])
427#define ieee754dp_1e31() \ 424#define ieee754sp_indef() (ieee754sp_spcvals[IEEE754_SPCVAL_INDEF])
428 (ieee754dp_spcvals[IEEE754_SPCVAL_P1E31]) 425#define ieee754sp_max(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PMAX+(sn)])
429#define ieee754dp_1e63() \ 426#define ieee754sp_min(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PMIN+(sn)])
430 (ieee754dp_spcvals[IEEE754_SPCVAL_P1E63]) 427#define ieee754sp_mind(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PMIND+(sn)])
431 428#define ieee754sp_1e31() (ieee754sp_spcvals[IEEE754_SPCVAL_P1E31])
432#define ieee754sp_inf(sn) \ 429#define ieee754sp_1e63() (ieee754sp_spcvals[IEEE754_SPCVAL_P1E63])
433 (ieee754sp_spcvals[IEEE754_SPCVAL_PINFINITY+(sn)]) 430
434#define ieee754sp_zero(sn) \ 431/*
435 (ieee754sp_spcvals[IEEE754_SPCVAL_PZERO+(sn)]) 432 * Indefinite integer value
436#define ieee754sp_one(sn) \ 433 */
437 (ieee754sp_spcvals[IEEE754_SPCVAL_PONE+(sn)])
438#define ieee754sp_ten(sn) \
439 (ieee754sp_spcvals[IEEE754_SPCVAL_PTEN+(sn)])
440#define ieee754sp_indef() \
441 (ieee754sp_spcvals[IEEE754_SPCVAL_INDEF])
442#define ieee754sp_max(sn) \
443 (ieee754sp_spcvals[IEEE754_SPCVAL_PMAX+(sn)])
444#define ieee754sp_min(sn) \
445 (ieee754sp_spcvals[IEEE754_SPCVAL_PMIN+(sn)])
446#define ieee754sp_mind(sn) \
447 (ieee754sp_spcvals[IEEE754_SPCVAL_PMIND+(sn)])
448#define ieee754sp_1e31() \
449 (ieee754sp_spcvals[IEEE754_SPCVAL_P1E31])
450#define ieee754sp_1e63() \
451 (ieee754sp_spcvals[IEEE754_SPCVAL_P1E63])
452
453/* indefinite integer value
454*/
455#define ieee754si_indef() INT_MAX 434#define ieee754si_indef() INT_MAX
456#ifdef LONG_LONG_MAX 435#ifdef LONG_LONG_MAX
457#define ieee754di_indef() LONG_LONG_MAX 436#define ieee754di_indef() LONG_LONG_MAX