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author | Rafał Bilski <rafalbilski@interia.pl> | 2006-07-04 11:50:57 -0400 |
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committer | Dave Jones <davej@redhat.com> | 2006-07-31 18:37:05 -0400 |
commit | 48b7bde0f6d5fd08d046b583cfa0118ad74c6caf (patch) | |
tree | 67473b4acac35e23c6acfa17e7e5e4de3b626d15 /arch/mips/math-emu/kernel_linkage.c | |
parent | dadb49d8746bc4a4b5a310dabf0c838e57a9b531 (diff) |
[CPUFREQ] Longhaul - Workaround issues with APIC.
There is no need to worry about local APIC.
There is need to worry about I/O APIC, because I/O APIC
is replacing good old 8259. According to Nehemiah datasheet VIA is
using 3-wire bus to connect local APIC to I/O APIC.
"[...] When IA32_APIC_BASE[11] is set to 0, processor APICs based on the 3-wire APIC
bus cannot be generally re-enabled until a system hardware reset. The 3-wire bus
looses track of arbitration that would be necessary for complete re-enabling. Certain
(local) APIC functionality can be enabled. [...]"
So we must set disable bit for each interrupt in I/O APIC registers.
Same situation as for PIC - we must poke registers direcly.
How to do this? I don't know. So at the moment it is better to fail.
Signed-off-by: Rafał Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
Diffstat (limited to 'arch/mips/math-emu/kernel_linkage.c')
0 files changed, 0 insertions, 0 deletions