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authorDavid Daney <ddaney@caviumnetworks.com>2009-11-05 14:34:26 -0500
committerRalf Baechle <ralf@linux-mips.org>2009-12-16 20:57:08 -0500
commitb6ee75ed4fa201873d3a2b32dfce2dbd701a2de4 (patch)
tree4574e5e523e9773fb1c8e4e579dc8f3be133daa6 /arch/mips/math-emu/dsemul.c
parent32028f1f7bce32e72183129dc55fc23656e7081c (diff)
MIPS: Collect FPU emulator statistics per-CPU.
On SMP systems, the collection of statistics can cause cache line bouncing in the lines associated with the counters. Also there are races incrementing the counters on multiple CPUs. To fix both problems, we collect the statistics in per-CPU variables, and add them up in the debugfs read operation. As a test I ran the LTP float_bessel test on a 12 CPU Octeon system. Without CONFIG_DEBUG_FS : 2602 seconds. With CONFIG_DEBUG_FS: 2640 seconds. With non-cpu-local atomic statistics: 14569 seconds. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/math-emu/dsemul.c')
-rw-r--r--arch/mips/math-emu/dsemul.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/math-emu/dsemul.c b/arch/mips/math-emu/dsemul.c
index df7b9d928efc..36d975ae08f8 100644
--- a/arch/mips/math-emu/dsemul.c
+++ b/arch/mips/math-emu/dsemul.c
@@ -98,7 +98,7 @@ int mips_dsemul(struct pt_regs *regs, mips_instruction ir, unsigned long cpc)
98 err |= __put_user(cpc, &fr->epc); 98 err |= __put_user(cpc, &fr->epc);
99 99
100 if (unlikely(err)) { 100 if (unlikely(err)) {
101 fpuemustats.errors++; 101 MIPS_FPU_EMU_INC_STATS(errors);
102 return SIGBUS; 102 return SIGBUS;
103 } 103 }
104 104
@@ -136,7 +136,7 @@ int do_dsemulret(struct pt_regs *xcp)
136 err |= __get_user(cookie, &fr->cookie); 136 err |= __get_user(cookie, &fr->cookie);
137 137
138 if (unlikely(err || (insn != BREAK_MATH) || (cookie != BD_COOKIE))) { 138 if (unlikely(err || (insn != BREAK_MATH) || (cookie != BD_COOKIE))) {
139 fpuemustats.errors++; 139 MIPS_FPU_EMU_INC_STATS(errors);
140 return 0; 140 return 0;
141 } 141 }
142 142