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authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2006-05-15 12:26:03 -0400
committerRalf Baechle <ralf@linux-mips.org>2006-06-19 12:39:18 -0400
commiteae89076e696f51762d81d6e2538c3beb59fa7bd (patch)
tree7aab0972d6786721eb6c9b01d77a1b5f13263c49 /arch/mips/math-emu/cp1emu.c
parent5deee2dbf495b2693629f7e8f846483432096278 (diff)
[MIPS] Unify mips_fpu_soft_struct and mips_fpu_hard_structs.
The struct mips_fpu_soft_struct and mips_fpu_hard_struct are completely same now and the kernel fpu emulator assumes that. This patch unifies them to mips_fpu_struct and get rid of mips_fpu_union. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/math-emu/cp1emu.c')
-rw-r--r--arch/mips/math-emu/cp1emu.c15
1 files changed, 7 insertions, 8 deletions
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index aa5818a0d884..3f0d5d26d506 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -60,15 +60,15 @@
60 60
61/* Function which emulates a floating point instruction. */ 61/* Function which emulates a floating point instruction. */
62 62
63static int fpu_emu(struct pt_regs *, struct mips_fpu_soft_struct *, 63static int fpu_emu(struct pt_regs *, struct mips_fpu_struct *,
64 mips_instruction); 64 mips_instruction);
65 65
66#if __mips >= 4 && __mips != 32 66#if __mips >= 4 && __mips != 32
67static int fpux_emu(struct pt_regs *, 67static int fpux_emu(struct pt_regs *,
68 struct mips_fpu_soft_struct *, mips_instruction); 68 struct mips_fpu_struct *, mips_instruction);
69#endif 69#endif
70 70
71/* Further private data for which no space exists in mips_fpu_soft_struct */ 71/* Further private data for which no space exists in mips_fpu_struct */
72 72
73struct mips_fpu_emulator_stats fpuemustats; 73struct mips_fpu_emulator_stats fpuemustats;
74 74
@@ -203,7 +203,7 @@ static int isBranchInstr(mips_instruction * i)
203 * Two instructions if the instruction is in a branch delay slot. 203 * Two instructions if the instruction is in a branch delay slot.
204 */ 204 */
205 205
206static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx) 206static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx)
207{ 207{
208 mips_instruction ir; 208 mips_instruction ir;
209 void * emulpc, *contpc; 209 void * emulpc, *contpc;
@@ -595,7 +595,7 @@ DEF3OP(msub, dp, ieee754dp_mul, ieee754dp_sub,);
595DEF3OP(nmadd, dp, ieee754dp_mul, ieee754dp_add, ieee754dp_neg); 595DEF3OP(nmadd, dp, ieee754dp_mul, ieee754dp_add, ieee754dp_neg);
596DEF3OP(nmsub, dp, ieee754dp_mul, ieee754dp_sub, ieee754dp_neg); 596DEF3OP(nmsub, dp, ieee754dp_mul, ieee754dp_sub, ieee754dp_neg);
597 597
598static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx, 598static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
599 mips_instruction ir) 599 mips_instruction ir)
600{ 600{
601 unsigned rcsr = 0; /* resulting csr */ 601 unsigned rcsr = 0; /* resulting csr */
@@ -759,7 +759,7 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
759/* 759/*
760 * Emulate a single COP1 arithmetic instruction. 760 * Emulate a single COP1 arithmetic instruction.
761 */ 761 */
762static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx, 762static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
763 mips_instruction ir) 763 mips_instruction ir)
764{ 764{
765 int rfmt; /* resulting format */ 765 int rfmt; /* resulting format */
@@ -1233,8 +1233,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
1233 return 0; 1233 return 0;
1234} 1234}
1235 1235
1236int fpu_emulator_cop1Handler(struct pt_regs *xcp, 1236int fpu_emulator_cop1Handler(struct pt_regs *xcp, struct mips_fpu_struct *ctx)
1237 struct mips_fpu_soft_struct *ctx)
1238{ 1237{
1239 unsigned long oldepc, prevepc; 1238 unsigned long oldepc, prevepc;
1240 mips_instruction insn; 1239 mips_instruction insn;