MIPS: Loongson: Add basic Loongson 2F support

Loongson 2F has built-in DDR2 and PCI-X controller. The PCI-X controller
has a programming interface similiar to the the FPGA northbridge used on
Loongson 2E.

The main differences between Loongson 2E and Loongson 2F include:

1. Loongson 2F has an extra address window configuration module, which
   is used to map CPU address space to DDR or PCI address space, or map
   the PCI-DMA address space to DDR or LIO address space.

2. Loongson 2F supports 8 levels of software configurable CPu frequency
   which can be configured in the LOONGSON_CHIPCFG0 register.  The coming
   cpufreq and standby support are based on this feature.

Loongson.h abstracts the modules and corresponding methods are abstracted.

Add other Loongson-2F-specific source code including gcc 4.4 support, PCI
memory space, PCI IO space, DMA address.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

4 files changed, 45 insertions, 9 deletions

diff --git a/arch/mips/loongson/common/bonito-irq.c b/arch/mips/loongson/common/bonito-irq.c
index a1cbd110a6e4..2dc2a4cc632a 100644
--- a/arch/mips/loongson/common/bonito-irq.c
+++ b/arch/mips/loongson/common/bonito-irq.c
@@ -12,6 +12,7 @@
  *  option) any later version.
  */
 #include <linux/interrupt.h>
+#include <linux/compiler.h>
 
 #include <loongson.h>
 
@@ -35,7 +36,7 @@ static struct irq_chip bonito_irq_type = {
         .unmask = bonito_irq_enable,
 };
 
-static struct irqaction dma_timeout_irqaction = {
+static struct irqaction __maybe_unused dma_timeout_irqaction = {
         .handler        = no_action,
         .name           = "dma_timeout",
 };
@@ -47,5 +48,7 @@ void bonito_irq_init(void)
         for (i = LOONGSON_IRQ_BASE; i < LOONGSON_IRQ_BASE + 32; i++)
                 set_irq_chip_and_handler(i, &bonito_irq_type, handle_level_irq);
 
+#ifdef CONFIG_CPU_LOONGSON2E
         setup_irq(LOONGSON_IRQ_BASE + 10, &dma_timeout_irqaction);
+#endif
 }
diff --git a/arch/mips/loongson/common/init.c b/arch/mips/loongson/common/init.c
index 3b1dbc1ca242..743d3571f010 100644
--- a/arch/mips/loongson/common/init.c
+++ b/arch/mips/loongson/common/init.c
@@ -12,12 +12,20 @@
 
 #include <loongson.h>
 
+/* Loongson CPU address windows config space base address */
+unsigned long __maybe_unused _loongson_addrwincfg_base;
+
 void __init prom_init(void)
 {
         /* init base address of io space */
         set_io_port_base((unsigned long)
                 ioremap(LOONGSON_PCIIO_BASE, LOONGSON_PCIIO_SIZE));
 
+#if defined(CONFIG_CPU_LOONGSON2F) && defined(CONFIG_64BIT)
+        _loongson_addrwincfg_base = (unsigned long)
+                ioremap(LOONGSON_ADDRWINCFG_BASE, LOONGSON_ADDRWINCFG_SIZE);
+#endif
+
         prom_init_cmdline();
         prom_init_env();
         prom_init_memory();
diff --git a/arch/mips/loongson/common/mem.c b/arch/mips/loongson/common/mem.c
index 3f7f153b1974..e93551dbc9ea 100644
--- a/arch/mips/loongson/common/mem.c
+++ b/arch/mips/loongson/common/mem.c
@@ -21,14 +21,31 @@ void __init prom_init_memory(void)
     add_memory_region(memsize << 20, LOONGSON_PCI_MEM_START - (memsize <<
                             20), BOOT_MEM_RESERVED);
 #ifdef CONFIG_64BIT
-    if (highmemsize > 0)
-        add_memory_region(LOONGSON_HIGHMEM_START,
-                highmemsize << 20, BOOT_MEM_RAM);
-
-    add_memory_region(LOONGSON_PCI_MEM_END + 1, LOONGSON_HIGHMEM_START -
-                    LOONGSON_PCI_MEM_END - 1, BOOT_MEM_RESERVED);
-
-#endif /* CONFIG_64BIT */
+#ifdef CONFIG_CPU_LOONGSON2F
+        {
+                int bit;
+
+                bit = fls(memsize + highmemsize);
+                if (bit != ffs(memsize + highmemsize))
+                        bit += 20;
+                else
+                        bit = bit + 20 - 1;
+
+                /* set cpu window3 to map CPU to DDR: 2G -> 2G */
+                LOONGSON_ADDRWIN_CPUTODDR(ADDRWIN_WIN3, 0x80000000ul,
+                                          0x80000000ul, (1 << bit));
+                mmiowb();
+        }
+#endif                          /* CONFIG_CPU_LOONGSON2F */
+
+        if (highmemsize > 0)
+                add_memory_region(LOONGSON_HIGHMEM_START,
+                                  highmemsize << 20, BOOT_MEM_RAM);
+
+        add_memory_region(LOONGSON_PCI_MEM_END + 1, LOONGSON_HIGHMEM_START -
+                          LOONGSON_PCI_MEM_END - 1, BOOT_MEM_RESERVED);
+
+#endif                          /* CONFIG_64BIT */
 }
 
 /* override of arch/mips/mm/cache.c: __uncached_access */
diff --git a/arch/mips/loongson/common/pci.c b/arch/mips/loongson/common/pci.c
index a7eb8b9c44ee..eac43b8f695e 100644
--- a/arch/mips/loongson/common/pci.c
+++ b/arch/mips/loongson/common/pci.c
@@ -67,6 +67,14 @@ static void __init setup_pcimap(void)
         /* can not change gnt to break pci transfer when device's gnt not
         deassert for some broken device */
         LOONGSON_PXARB_CFG = 0x00fe0105ul;
+
+#if defined(CONFIG_CPU_LOONGSON2F) && defined(CONFIG_64BIT)
+        /*
+         * set cpu addr window2 to map CPU address space to PCI address space
+         */
+        LOONGSON_ADDRWIN_CPUTOPCI(ADDRWIN_WIN2, LOONGSON_CPU_MEM_SRC,
+                LOONGSON_PCI_MEM_DST, MMAP_CPUTOPCI_SIZE);
+#endif
 }
 
 static int __init pcibios_init(void)