MIPS: Loongson: Remove set_irq_trigger_mode()

set_irq_trigger_mode() is not needed on all platforms so remove it
and move the related source code to mach_init_irq().

This will allow gdium to share the common irq.c without adding an empty
set_irq_trigger_mode().

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1493/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

3 files changed, 8 insertions, 17 deletions

diff --git a/arch/mips/loongson/common/irq.c b/arch/mips/loongson/common/irq.c
index 25a11df03482..5897471dedca 100644
--- a/arch/mips/loongson/common/irq.c
+++ b/arch/mips/loongson/common/irq.c
@@ -53,9 +53,6 @@ void __init arch_init_irq(void)
          */
         clear_c0_status(ST0_IM | ST0_BEV);
 
-        /* setting irq trigger mode */
-        set_irq_trigger_mode();
-
         /* no steer */
         LOONGSON_INTSTEER = 0;
 
diff --git a/arch/mips/loongson/fuloong-2e/irq.c b/arch/mips/loongson/fuloong-2e/irq.c
index 320e9379bdd7..99e08c3db3f4 100644
--- a/arch/mips/loongson/fuloong-2e/irq.c
+++ b/arch/mips/loongson/fuloong-2e/irq.c
@@ -44,13 +44,6 @@ static struct irqaction cascade_irqaction = {
         .name = "cascade",
 };
 
-void __init set_irq_trigger_mode(void)
-{
-        /* most bonito irq should be level triggered */
-        LOONGSON_INTEDGE = LOONGSON_ICU_SYSTEMERR | LOONGSON_ICU_MASTERERR |
-            LOONGSON_ICU_RETRYERR | LOONGSON_ICU_MBOXES;
-}
-
 void __init mach_init_irq(void)
 {
         /* init all controller
@@ -59,6 +52,10 @@ void __init mach_init_irq(void)
          *   32-63        ------> bonito irq
          */
 
+        /* most bonito irq should be level triggered */
+        LOONGSON_INTEDGE = LOONGSON_ICU_SYSTEMERR | LOONGSON_ICU_MASTERERR |
+            LOONGSON_ICU_RETRYERR | LOONGSON_ICU_MBOXES;
+
         /* Sets the first-level interrupt dispatcher. */
         mips_cpu_irq_init();
         init_i8259_irqs();
diff --git a/arch/mips/loongson/lemote-2f/irq.c b/arch/mips/loongson/lemote-2f/irq.c
index 1d8b4d28a058..c6db7e7df963 100644
--- a/arch/mips/loongson/lemote-2f/irq.c
+++ b/arch/mips/loongson/lemote-2f/irq.c
@@ -91,13 +91,6 @@ void mach_irq_dispatch(unsigned int pending)
                 spurious_interrupt();
 }
 
-void __init set_irq_trigger_mode(void)
-{
-        /* setup cs5536 as high level trigger */
-        LOONGSON_INTPOL = LOONGSON_INT_BIT_INT0 | LOONGSON_INT_BIT_INT1;
-        LOONGSON_INTEDGE &= ~(LOONGSON_INT_BIT_INT0 | LOONGSON_INT_BIT_INT1);
-}
-
 static irqreturn_t ip6_action(int cpl, void *dev_id)
 {
         return IRQ_HANDLED;
@@ -122,6 +115,10 @@ void __init mach_init_irq(void)
          *   32-63        ------> bonito irq
          */
 
+        /* setup cs5536 as high level trigger */
+        LOONGSON_INTPOL = LOONGSON_INT_BIT_INT0 | LOONGSON_INT_BIT_INT1;
+        LOONGSON_INTEDGE &= ~(LOONGSON_INT_BIT_INT0 | LOONGSON_INT_BIT_INT1);
+
         /* Sets the first-level interrupt dispatcher. */
         mips_cpu_irq_init();
         init_i8259_irqs();