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authorWu Zhangjin <wuzhangjin@gmail.com>2010-07-23 21:22:15 -0400
committerRalf Baechle <ralf@linux-mips.org>2010-08-05 08:26:26 -0400
commite608aadd17b2430ad9f6c412311bfcc120222ae3 (patch)
treeaff3cd13a88d3a48880ced4830de0f39ac0c410d /arch/mips/loongson
parentde3bc0e7ba5e89d63cb2dbac4e49a5c4b18669b5 (diff)
MIPS: Loongson: Remove unused macro LOONGSON_PERFCNT_IRQ
LOONGSON2_PERFCNT_IRQ is used for the irq number of the performance overflow interrupts; LOONGSON_PERFCNT_IRQ is unused so remove it. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1494/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/loongson')
-rw-r--r--arch/mips/loongson/lemote-2f/irq.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/mips/loongson/lemote-2f/irq.c b/arch/mips/loongson/lemote-2f/irq.c
index 71347d7030c5..081db102bb98 100644
--- a/arch/mips/loongson/lemote-2f/irq.c
+++ b/arch/mips/loongson/lemote-2f/irq.c
@@ -19,7 +19,6 @@
19#include <machine.h> 19#include <machine.h>
20 20
21#define LOONGSON_TIMER_IRQ (MIPS_CPU_IRQ_BASE + 7) /* cpu timer */ 21#define LOONGSON_TIMER_IRQ (MIPS_CPU_IRQ_BASE + 7) /* cpu timer */
22#define LOONGSON_PERFCNT_IRQ (MIPS_CPU_IRQ_BASE + 6) /* cpu perf counter */
23#define LOONGSON_NORTH_BRIDGE_IRQ (MIPS_CPU_IRQ_BASE + 6) /* bonito */ 22#define LOONGSON_NORTH_BRIDGE_IRQ (MIPS_CPU_IRQ_BASE + 6) /* bonito */
24#define LOONGSON_UART_IRQ (MIPS_CPU_IRQ_BASE + 3) /* cpu serial port */ 23#define LOONGSON_UART_IRQ (MIPS_CPU_IRQ_BASE + 3) /* cpu serial port */
25#define LOONGSON_SOUTH_BRIDGE_IRQ (MIPS_CPU_IRQ_BASE + 2) /* i8259 */ 24#define LOONGSON_SOUTH_BRIDGE_IRQ (MIPS_CPU_IRQ_BASE + 2) /* i8259 */