diff options
author | Wu Zhangjin <wuzhangjin@gmail.com> | 2011-07-23 08:41:24 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2011-09-21 11:52:22 -0400 |
commit | 77cbece76723dc9e77497c042827155388bdae6d (patch) | |
tree | 1e5088ac11f3192beb09a7d8718d88a84ace6e73 /arch/mips/loongson/fuloong-2e/irq.c | |
parent | 5a4a4ad851dd8db2d888fb86c8bd946b2ae79f60 (diff) |
MIPS: Loongson: Mark cascade interrupts IRQF_NO_THREAD
There are two cascade interrupts in Loongson machines, one for bonito
northbridge, another for the 8259A controller in the southbridge. Both
want to be non threaded.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/2638/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/loongson/fuloong-2e/irq.c')
-rw-r--r-- | arch/mips/loongson/fuloong-2e/irq.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/loongson/fuloong-2e/irq.c b/arch/mips/loongson/fuloong-2e/irq.c index d61a04222b87..3cf1fef29f0e 100644 --- a/arch/mips/loongson/fuloong-2e/irq.c +++ b/arch/mips/loongson/fuloong-2e/irq.c | |||
@@ -42,6 +42,7 @@ asmlinkage void mach_irq_dispatch(unsigned int pending) | |||
42 | static struct irqaction cascade_irqaction = { | 42 | static struct irqaction cascade_irqaction = { |
43 | .handler = no_action, | 43 | .handler = no_action, |
44 | .name = "cascade", | 44 | .name = "cascade", |
45 | .flags = IRQF_NO_THREAD, | ||
45 | }; | 46 | }; |
46 | 47 | ||
47 | void __init mach_init_irq(void) | 48 | void __init mach_init_irq(void) |