MIPS: Add NUMA support for Loongson-3

Multiple Loongson-3A chips can be interconnected with HT0-bus. This is
a CC-NUMA system that every chip (node) has its own local memory and
cache coherency is maintained by hardware. The 64-bit physical memory
address format is as follows:

0x-0000-YZZZ-ZZZZ-ZZZZ

The high 16 bits should be 0, which means the real physical address
supported by Loongson-3 is 48-bit. The "Y" bits is the base address of
each node, which can be also considered as the node-id. The "Z" bits is
the address offset within a node, which means every node has a 44 bits
address space.

Macros XPHYSADDR and MAX_PHYSMEM_BITS are modified unconditionally,
because many other MIPS CPUs have also extended their address spaces.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: John Crispin <john@phrozen.org>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/7187/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

2 files changed, 11 insertions, 0 deletions

diff --git a/arch/mips/loongson/common/env.c b/arch/mips/loongson/common/env.c
index dc592412f764..33a13b9e436c 100644
--- a/arch/mips/loongson/common/env.c
+++ b/arch/mips/loongson/common/env.c
@@ -80,17 +80,24 @@ void __init prom_init_env(void)
         cpu_clock_freq = ecpu->cpu_clock_freq;
         loongson_sysconf.cputype = ecpu->cputype;
         if (ecpu->cputype == Loongson_3A) {
+                loongson_sysconf.cores_per_node = 4;
+                loongson_sysconf.cores_per_package = 4;
                 loongson_chipcfg[0] = 0x900000001fe00180;
                 loongson_chipcfg[1] = 0x900010001fe00180;
                 loongson_chipcfg[2] = 0x900020001fe00180;
                 loongson_chipcfg[3] = 0x900030001fe00180;
         } else {
+                loongson_sysconf.cores_per_node = 1;
+                loongson_sysconf.cores_per_package = 1;
                 loongson_chipcfg[0] = 0x900000001fe00180;
         }
 
         loongson_sysconf.nr_cpus = ecpu->nr_cpus;
         if (ecpu->nr_cpus > NR_CPUS || ecpu->nr_cpus == 0)
                 loongson_sysconf.nr_cpus = NR_CPUS;
+        loongson_sysconf.nr_nodes = (loongson_sysconf.nr_cpus +
+                loongson_sysconf.cores_per_node - 1) /
+                loongson_sysconf.cores_per_node;
 
         loongson_sysconf.pci_mem_start_addr = eirq_source->pci_mem_start_addr;
         loongson_sysconf.pci_mem_end_addr = eirq_source->pci_mem_end_addr;
diff --git a/arch/mips/loongson/common/init.c b/arch/mips/loongson/common/init.c
index f37fe5413b73..f6af3aba4c86 100644
--- a/arch/mips/loongson/common/init.c
+++ b/arch/mips/loongson/common/init.c
@@ -30,7 +30,11 @@ void __init prom_init(void)
         set_io_port_base((unsigned long)
                 ioremap(LOONGSON_PCIIO_BASE, LOONGSON_PCIIO_SIZE));
 
+#ifdef CONFIG_NUMA
+        prom_init_numa_memory();
+#else
         prom_init_memory();
+#endif
 
         /*init the uart base address */
         prom_init_uart_base();