diff options
author | Huacai Chen <chenhc@lemote.com> | 2014-06-25 23:41:30 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2014-07-30 15:47:00 -0400 |
commit | e7841be50fe2b8751a51a068b8cdcdcb6611e354 (patch) | |
tree | d0ffedc83975c17cfa3357ebcb806a2fa86d3566 /arch/mips/loongson/common | |
parent | 1ff1ad6bc2c63f219cbc00dcdd35dcf36a7d6fe4 (diff) |
MIPS: Add Loongson-3B support
Loongson-3B is a 8-cores processor. In general it looks like there are
two Loongson-3A integrated in one chip: 8 cores are separated into two
groups (two NUMA node), each node has its own local memory.
Of course there are some differences between one Loongson-3B and two
Loongson-3A. E.g., the base addresses of IPI registers of each node are
not the same; Loongson-3A use ChipConfig register to enable/disable
clock, but Loongson-3B use FreqControl register instead.
There are two revision of Loongson-3B, the first revision is called as
Loongson-3B1000, whose frequency is 1GHz and has a PRid 0x6306, the
second revision is called as Loongson-3B1500, whose frequency is 1.5GHz
and has a PRid 0x6307. Both revisions has a bug that clock cannot be
disabled at runtime, but this will be fixed in future.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: John Crispin <john@phrozen.org>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/7188/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/loongson/common')
-rw-r--r-- | arch/mips/loongson/common/env.c | 31 |
1 files changed, 30 insertions, 1 deletions
diff --git a/arch/mips/loongson/common/env.c b/arch/mips/loongson/common/env.c index 33a13b9e436c..f15228550a22 100644 --- a/arch/mips/loongson/common/env.c +++ b/arch/mips/loongson/common/env.c | |||
@@ -28,6 +28,10 @@ struct efi_memory_map_loongson *loongson_memmap; | |||
28 | struct loongson_system_configuration loongson_sysconf; | 28 | struct loongson_system_configuration loongson_sysconf; |
29 | 29 | ||
30 | u64 loongson_chipcfg[MAX_PACKAGES] = {0xffffffffbfc00180}; | 30 | u64 loongson_chipcfg[MAX_PACKAGES] = {0xffffffffbfc00180}; |
31 | u64 loongson_freqctrl[MAX_PACKAGES]; | ||
32 | |||
33 | unsigned long long smp_group[4]; | ||
34 | int cpuhotplug_workaround = 0; | ||
31 | 35 | ||
32 | #define parse_even_earlier(res, option, p) \ | 36 | #define parse_even_earlier(res, option, p) \ |
33 | do { \ | 37 | do { \ |
@@ -82,10 +86,32 @@ void __init prom_init_env(void) | |||
82 | if (ecpu->cputype == Loongson_3A) { | 86 | if (ecpu->cputype == Loongson_3A) { |
83 | loongson_sysconf.cores_per_node = 4; | 87 | loongson_sysconf.cores_per_node = 4; |
84 | loongson_sysconf.cores_per_package = 4; | 88 | loongson_sysconf.cores_per_package = 4; |
89 | smp_group[0] = 0x900000003ff01000; | ||
90 | smp_group[1] = 0x900010003ff01000; | ||
91 | smp_group[2] = 0x900020003ff01000; | ||
92 | smp_group[3] = 0x900030003ff01000; | ||
85 | loongson_chipcfg[0] = 0x900000001fe00180; | 93 | loongson_chipcfg[0] = 0x900000001fe00180; |
86 | loongson_chipcfg[1] = 0x900010001fe00180; | 94 | loongson_chipcfg[1] = 0x900010001fe00180; |
87 | loongson_chipcfg[2] = 0x900020001fe00180; | 95 | loongson_chipcfg[2] = 0x900020001fe00180; |
88 | loongson_chipcfg[3] = 0x900030001fe00180; | 96 | loongson_chipcfg[3] = 0x900030001fe00180; |
97 | loongson_sysconf.ht_control_base = 0x90000EFDFB000000; | ||
98 | } else if (ecpu->cputype == Loongson_3B) { | ||
99 | loongson_sysconf.cores_per_node = 4; /* One chip has 2 nodes */ | ||
100 | loongson_sysconf.cores_per_package = 8; | ||
101 | smp_group[0] = 0x900000003ff01000; | ||
102 | smp_group[1] = 0x900010003ff05000; | ||
103 | smp_group[2] = 0x900020003ff09000; | ||
104 | smp_group[3] = 0x900030003ff0d000; | ||
105 | loongson_chipcfg[0] = 0x900000001fe00180; | ||
106 | loongson_chipcfg[1] = 0x900020001fe00180; | ||
107 | loongson_chipcfg[2] = 0x900040001fe00180; | ||
108 | loongson_chipcfg[3] = 0x900060001fe00180; | ||
109 | loongson_freqctrl[0] = 0x900000001fe001d0; | ||
110 | loongson_freqctrl[1] = 0x900020001fe001d0; | ||
111 | loongson_freqctrl[2] = 0x900040001fe001d0; | ||
112 | loongson_freqctrl[3] = 0x900060001fe001d0; | ||
113 | loongson_sysconf.ht_control_base = 0x90001EFDFB000000; | ||
114 | cpuhotplug_workaround = 1; | ||
89 | } else { | 115 | } else { |
90 | loongson_sysconf.cores_per_node = 1; | 116 | loongson_sysconf.cores_per_node = 1; |
91 | loongson_sysconf.cores_per_package = 1; | 117 | loongson_sysconf.cores_per_package = 1; |
@@ -111,7 +137,6 @@ void __init prom_init_env(void) | |||
111 | loongson_sysconf.poweroff_addr = boot_p->reset_system.Shutdown; | 137 | loongson_sysconf.poweroff_addr = boot_p->reset_system.Shutdown; |
112 | loongson_sysconf.suspend_addr = boot_p->reset_system.DoSuspend; | 138 | loongson_sysconf.suspend_addr = boot_p->reset_system.DoSuspend; |
113 | 139 | ||
114 | loongson_sysconf.ht_control_base = 0x90000EFDFB000000; | ||
115 | loongson_sysconf.vgabios_addr = boot_p->efi.smbios.vga_bios; | 140 | loongson_sysconf.vgabios_addr = boot_p->efi.smbios.vga_bios; |
116 | pr_debug("Shutdown Addr: %llx, Restart Addr: %llx, VBIOS Addr: %llx\n", | 141 | pr_debug("Shutdown Addr: %llx, Restart Addr: %llx, VBIOS Addr: %llx\n", |
117 | loongson_sysconf.poweroff_addr, loongson_sysconf.restart_addr, | 142 | loongson_sysconf.poweroff_addr, loongson_sysconf.restart_addr, |
@@ -129,6 +154,10 @@ void __init prom_init_env(void) | |||
129 | case PRID_REV_LOONGSON3A: | 154 | case PRID_REV_LOONGSON3A: |
130 | cpu_clock_freq = 900000000; | 155 | cpu_clock_freq = 900000000; |
131 | break; | 156 | break; |
157 | case PRID_REV_LOONGSON3B_R1: | ||
158 | case PRID_REV_LOONGSON3B_R2: | ||
159 | cpu_clock_freq = 1000000000; | ||
160 | break; | ||
132 | default: | 161 | default: |
133 | cpu_clock_freq = 100000000; | 162 | cpu_clock_freq = 100000000; |
134 | break; | 163 | break; |