MIPS: Loongson: Add basic Loongson 2F support

Loongson 2F has built-in DDR2 and PCI-X controller. The PCI-X controller
has a programming interface similiar to the the FPGA northbridge used on
Loongson 2E.

The main differences between Loongson 2E and Loongson 2F include:

1. Loongson 2F has an extra address window configuration module, which
   is used to map CPU address space to DDR or PCI address space, or map
   the PCI-DMA address space to DDR or LIO address space.

2. Loongson 2F supports 8 levels of software configurable CPu frequency
   which can be configured in the LOONGSON_CHIPCFG0 register.  The coming
   cpufreq and standby support are based on this feature.

Loongson.h abstracts the modules and corresponding methods are abstracted.

Add other Loongson-2F-specific source code including gcc 4.4 support, PCI
memory space, PCI IO space, DMA address.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1 files changed, 25 insertions, 8 deletions

diff --git a/arch/mips/loongson/common/mem.c b/arch/mips/loongson/common/mem.c
index 3f7f153b1974..e93551dbc9ea 100644
--- a/arch/mips/loongson/common/mem.c
+++ b/arch/mips/loongson/common/mem.c
@@ -21,14 +21,31 @@ void __init prom_init_memory(void)
     add_memory_region(memsize << 20, LOONGSON_PCI_MEM_START - (memsize <<
                             20), BOOT_MEM_RESERVED);
 #ifdef CONFIG_64BIT
-    if (highmemsize > 0)
-        add_memory_region(LOONGSON_HIGHMEM_START,
-                highmemsize << 20, BOOT_MEM_RAM);
-
-    add_memory_region(LOONGSON_PCI_MEM_END + 1, LOONGSON_HIGHMEM_START -
-                    LOONGSON_PCI_MEM_END - 1, BOOT_MEM_RESERVED);
-
-#endif /* CONFIG_64BIT */
+#ifdef CONFIG_CPU_LOONGSON2F
+        {
+                int bit;
+
+                bit = fls(memsize + highmemsize);
+                if (bit != ffs(memsize + highmemsize))
+                        bit += 20;
+                else
+                        bit = bit + 20 - 1;
+
+                /* set cpu window3 to map CPU to DDR: 2G -> 2G */
+                LOONGSON_ADDRWIN_CPUTODDR(ADDRWIN_WIN3, 0x80000000ul,
+                                          0x80000000ul, (1 << bit));
+                mmiowb();
+        }
+#endif                          /* CONFIG_CPU_LOONGSON2F */
+
+        if (highmemsize > 0)
+                add_memory_region(LOONGSON_HIGHMEM_START,
+                                  highmemsize << 20, BOOT_MEM_RAM);
+
+        add_memory_region(LOONGSON_PCI_MEM_END + 1, LOONGSON_HIGHMEM_START -
+                          LOONGSON_PCI_MEM_END - 1, BOOT_MEM_RESERVED);
+
+#endif                          /* CONFIG_64BIT */
 }
 
 /* override of arch/mips/mm/cache.c: __uncached_access */