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authorSteven J. Hill <Steven.Hill@imgtec.com>2013-03-25 12:58:57 -0400
committerRalf Baechle <ralf@linux-mips.org>2013-05-08 06:30:10 -0400
commitd532f3d26716a39dfd4b88d687bd344fbe77e390 (patch)
tree64bb16ffd8176e0c9e692817b1d17df717c127ed /arch/mips/lib
parent49bffbdc88fdd8f5eac40306a617252625a0fa35 (diff)
MIPS: Allow ASID size to be determined at boot time.
Original patch by Ralf Baechle and removed by Harold Koerfgen with commit f67e4ffc79905482c3b9b8c8dd65197bac7eb508. This allows for more generic kernels since the size of the ASID and corresponding masks can be determined at run-time. This patch is also required for the new Aptiv cores and has been tested on Malta and Malta Aptiv platforms. [ralf@linux-mips.org: Added relevant part of fix https://patchwork.linux-mips.org/patch/5213/] Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/lib')
-rw-r--r--arch/mips/lib/dump_tlb.c5
-rw-r--r--arch/mips/lib/r3k_dump_tlb.c7
2 files changed, 7 insertions, 5 deletions
diff --git a/arch/mips/lib/dump_tlb.c b/arch/mips/lib/dump_tlb.c
index 32b9f21bfd85..8a12d00908e0 100644
--- a/arch/mips/lib/dump_tlb.c
+++ b/arch/mips/lib/dump_tlb.c
@@ -11,6 +11,7 @@
11#include <asm/page.h> 11#include <asm/page.h>
12#include <asm/pgtable.h> 12#include <asm/pgtable.h>
13#include <asm/tlbdebug.h> 13#include <asm/tlbdebug.h>
14#include <asm/mmu_context.h>
14 15
15static inline const char *msk2str(unsigned int mask) 16static inline const char *msk2str(unsigned int mask)
16{ 17{
@@ -55,7 +56,7 @@ static void dump_tlb(int first, int last)
55 s_pagemask = read_c0_pagemask(); 56 s_pagemask = read_c0_pagemask();
56 s_entryhi = read_c0_entryhi(); 57 s_entryhi = read_c0_entryhi();
57 s_index = read_c0_index(); 58 s_index = read_c0_index();
58 asid = s_entryhi & 0xff; 59 asid = ASID_MASK(s_entryhi);
59 60
60 for (i = first; i <= last; i++) { 61 for (i = first; i <= last; i++) {
61 write_c0_index(i); 62 write_c0_index(i);
@@ -85,7 +86,7 @@ static void dump_tlb(int first, int last)
85 86
86 printk("va=%0*lx asid=%02lx\n", 87 printk("va=%0*lx asid=%02lx\n",
87 width, (entryhi & ~0x1fffUL), 88 width, (entryhi & ~0x1fffUL),
88 entryhi & 0xff); 89 ASID_MASK(entryhi));
89 printk("\t[pa=%0*llx c=%d d=%d v=%d g=%d] ", 90 printk("\t[pa=%0*llx c=%d d=%d v=%d g=%d] ",
90 width, 91 width,
91 (entrylo0 << 6) & PAGE_MASK, c0, 92 (entrylo0 << 6) & PAGE_MASK, c0,
diff --git a/arch/mips/lib/r3k_dump_tlb.c b/arch/mips/lib/r3k_dump_tlb.c
index 91615c2ef0cf..8327698b9937 100644
--- a/arch/mips/lib/r3k_dump_tlb.c
+++ b/arch/mips/lib/r3k_dump_tlb.c
@@ -9,6 +9,7 @@
9#include <linux/mm.h> 9#include <linux/mm.h>
10 10
11#include <asm/mipsregs.h> 11#include <asm/mipsregs.h>
12#include <asm/mmu_context.h>
12#include <asm/page.h> 13#include <asm/page.h>
13#include <asm/pgtable.h> 14#include <asm/pgtable.h>
14#include <asm/tlbdebug.h> 15#include <asm/tlbdebug.h>
@@ -21,7 +22,7 @@ static void dump_tlb(int first, int last)
21 unsigned int asid; 22 unsigned int asid;
22 unsigned long entryhi, entrylo0; 23 unsigned long entryhi, entrylo0;
23 24
24 asid = read_c0_entryhi() & 0xfc0; 25 asid = ASID_MASK(read_c0_entryhi());
25 26
26 for (i = first; i <= last; i++) { 27 for (i = first; i <= last; i++) {
27 write_c0_index(i<<8); 28 write_c0_index(i<<8);
@@ -35,7 +36,7 @@ static void dump_tlb(int first, int last)
35 36
36 /* Unused entries have a virtual address of KSEG0. */ 37 /* Unused entries have a virtual address of KSEG0. */
37 if ((entryhi & 0xffffe000) != 0x80000000 38 if ((entryhi & 0xffffe000) != 0x80000000
38 && (entryhi & 0xfc0) == asid) { 39 && (ASID_MASK(entryhi) == asid)) {
39 /* 40 /*
40 * Only print entries in use 41 * Only print entries in use
41 */ 42 */
@@ -44,7 +45,7 @@ static void dump_tlb(int first, int last)
44 printk("va=%08lx asid=%08lx" 45 printk("va=%08lx asid=%08lx"
45 " [pa=%06lx n=%d d=%d v=%d g=%d]", 46 " [pa=%06lx n=%d d=%d v=%d g=%d]",
46 (entryhi & 0xffffe000), 47 (entryhi & 0xffffe000),
47 entryhi & 0xfc0, 48 ASID_MASK(entryhi),
48 entrylo0 & PAGE_MASK, 49 entrylo0 & PAGE_MASK,
49 (entrylo0 & (1 << 11)) ? 1 : 0, 50 (entrylo0 & (1 << 11)) ? 1 : 0,
50 (entrylo0 & (1 << 10)) ? 1 : 0, 51 (entrylo0 & (1 << 10)) ? 1 : 0,