diff options
author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2007-06-04 12:28:07 -0400 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2007-07-10 12:32:59 -0400 |
commit | b63e804459b9b550c1ab21a43e6bac2272e32612 (patch) | |
tree | f39ace33d68675f57a786e44bda27f54c595cd83 /arch/mips/lib-32 | |
parent | c66df567e596bd43d6d3e094d82f82951e1b17cd (diff) |
[MIPS] Remove unused watchpoint support and arch/mips/lib-{32,64}
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/lib-32')
-rw-r--r-- | arch/mips/lib-32/Makefile | 5 | ||||
-rw-r--r-- | arch/mips/lib-32/watch.S | 60 |
2 files changed, 0 insertions, 65 deletions
diff --git a/arch/mips/lib-32/Makefile b/arch/mips/lib-32/Makefile deleted file mode 100644 index 7bae849e544a..000000000000 --- a/arch/mips/lib-32/Makefile +++ /dev/null | |||
@@ -1,5 +0,0 @@ | |||
1 | # | ||
2 | # Makefile for MIPS-specific library files.. | ||
3 | # | ||
4 | |||
5 | lib-y += watch.o | ||
diff --git a/arch/mips/lib-32/watch.S b/arch/mips/lib-32/watch.S deleted file mode 100644 index 808b3af1a605..000000000000 --- a/arch/mips/lib-32/watch.S +++ /dev/null | |||
@@ -1,60 +0,0 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Kernel debug stuff to use the Watch registers. | ||
7 | * Useful to find stack overflows, dangling pointers etc. | ||
8 | * | ||
9 | * Copyright (C) 1995, 1996, 1999 by Ralf Baechle | ||
10 | */ | ||
11 | #include <asm/asm.h> | ||
12 | #include <asm/mipsregs.h> | ||
13 | #include <asm/regdef.h> | ||
14 | |||
15 | .set noreorder | ||
16 | /* | ||
17 | * Parameter: a0 - logic address to watch | ||
18 | * Currently only KSEG0 addresses are allowed! | ||
19 | * a1 - set bit #1 to trap on load references | ||
20 | * bit #0 to trap on store references | ||
21 | * Results : none | ||
22 | */ | ||
23 | LEAF(__watch_set) | ||
24 | li t0, 0x80000000 | ||
25 | subu a0, t0 | ||
26 | ori a0, 7 | ||
27 | xori a0, 7 | ||
28 | or a0, a1 | ||
29 | mtc0 a0, CP0_WATCHLO | ||
30 | sw a0, watch_savelo | ||
31 | |||
32 | jr ra | ||
33 | mtc0 zero, CP0_WATCHHI | ||
34 | END(__watch_set) | ||
35 | |||
36 | /* | ||
37 | * Parameter: none | ||
38 | * Results : none | ||
39 | */ | ||
40 | LEAF(__watch_clear) | ||
41 | jr ra | ||
42 | mtc0 zero, CP0_WATCHLO | ||
43 | END(__watch_clear) | ||
44 | |||
45 | /* | ||
46 | * Parameter: none | ||
47 | * Results : none | ||
48 | */ | ||
49 | LEAF(__watch_reenable) | ||
50 | lw t0, watch_savelo | ||
51 | jr ra | ||
52 | mtc0 t0, CP0_WATCHLO | ||
53 | END(__watch_reenable) | ||
54 | |||
55 | /* | ||
56 | * Saved value of the c0_watchlo register for watch_reenable() | ||
57 | */ | ||
58 | .data | ||
59 | watch_savelo: .word 0 | ||
60 | .text | ||