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authorManuel Lauss <mano@roarinelk.homelinux.net>2009-03-25 12:49:28 -0400
committerRalf Baechle <ralf@linux-mips.org>2009-03-30 08:49:45 -0400
commit270717a8a0e5f03c104a6d47466036b615edfcde (patch)
tree33b319a455d24b246df5200e523aa66a7341cb42 /arch/mips/kernel
parent76544504aebc606b8279a5314595af5d568e7fea (diff)
MIPS: Alchemy: unify CPU model constants.
This patch removes the various CPU_AU1??? model constants in favor of a single CPU_ALCHEMY one. All currently existing Alchemy models are identical in terms of cpu core and cache size/organization. The parts of the mips kernel which need to know the exact CPU revision extract it from the c0_prid register already; and finally nothing else in-tree depends on those any more. Should a new variant with slightly different "company options" and/or "processor revision" bits in c0_prid appear, it will be supported immediately (minus an exact model string in cpuinfo). Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r--arch/mips/kernel/cpu-probe.c21
1 files changed, 4 insertions, 17 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 1bdbcad3bb74..b13b8eb30596 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -183,13 +183,7 @@ void __init check_wait(void)
183 case CPU_TX49XX: 183 case CPU_TX49XX:
184 cpu_wait = r4k_wait_irqoff; 184 cpu_wait = r4k_wait_irqoff;
185 break; 185 break;
186 case CPU_AU1000: 186 case CPU_ALCHEMY:
187 case CPU_AU1100:
188 case CPU_AU1500:
189 case CPU_AU1550:
190 case CPU_AU1200:
191 case CPU_AU1210:
192 case CPU_AU1250:
193 cpu_wait = au1k_wait; 187 cpu_wait = au1k_wait;
194 break; 188 break;
195 case CPU_20KC: 189 case CPU_20KC:
@@ -783,37 +777,30 @@ static inline void cpu_probe_alchemy(struct cpuinfo_mips *c, unsigned int cpu)
783 switch (c->processor_id & 0xff00) { 777 switch (c->processor_id & 0xff00) {
784 case PRID_IMP_AU1_REV1: 778 case PRID_IMP_AU1_REV1:
785 case PRID_IMP_AU1_REV2: 779 case PRID_IMP_AU1_REV2:
780 c->cputype = CPU_ALCHEMY;
786 switch ((c->processor_id >> 24) & 0xff) { 781 switch ((c->processor_id >> 24) & 0xff) {
787 case 0: 782 case 0:
788 c->cputype = CPU_AU1000;
789 __cpu_name[cpu] = "Au1000"; 783 __cpu_name[cpu] = "Au1000";
790 break; 784 break;
791 case 1: 785 case 1:
792 c->cputype = CPU_AU1500;
793 __cpu_name[cpu] = "Au1500"; 786 __cpu_name[cpu] = "Au1500";
794 break; 787 break;
795 case 2: 788 case 2:
796 c->cputype = CPU_AU1100;
797 __cpu_name[cpu] = "Au1100"; 789 __cpu_name[cpu] = "Au1100";
798 break; 790 break;
799 case 3: 791 case 3:
800 c->cputype = CPU_AU1550;
801 __cpu_name[cpu] = "Au1550"; 792 __cpu_name[cpu] = "Au1550";
802 break; 793 break;
803 case 4: 794 case 4:
804 c->cputype = CPU_AU1200;
805 __cpu_name[cpu] = "Au1200"; 795 __cpu_name[cpu] = "Au1200";
806 if ((c->processor_id & 0xff) == 2) { 796 if ((c->processor_id & 0xff) == 2)
807 c->cputype = CPU_AU1250;
808 __cpu_name[cpu] = "Au1250"; 797 __cpu_name[cpu] = "Au1250";
809 }
810 break; 798 break;
811 case 5: 799 case 5:
812 c->cputype = CPU_AU1210;
813 __cpu_name[cpu] = "Au1210"; 800 __cpu_name[cpu] = "Au1210";
814 break; 801 break;
815 default: 802 default:
816 panic("Unknown Au Core!"); 803 __cpu_name[cpu] = "Au1xxx";
817 break; 804 break;
818 } 805 }
819 break; 806 break;