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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-19 15:01:22 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-19 15:01:22 -0400
commit0a4908e19fd016d60403fc76cf38b2d08d21e2d2 (patch)
treef8f33a474bfb9835625677c76735fb27fe0a2b75 /arch/mips/kernel
parent2843483d2eb02ad104edbe8b2429fb6a39d25063 (diff)
parent6f75aaa72af19d3e4d144e13d59e71f51686b77f (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: [MIPS] Delete totally outdated Documentation/mips/time.README [MIPS] Kill duplicated setup_irq() for cp0 timer [MIPS] Sibyte: Finish conversion to modern time APIs. [MIPS] time: Helpers to compute clocksource/event shift and mult values. [MIPS] SMTC: Build fix. [MIPS] time: Delete dead code. [MIPS] MIPSsim: Strip defconfig file to the bones.
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r--arch/mips/kernel/cevt-r4k.c1
-rw-r--r--arch/mips/kernel/time.c92
2 files changed, 29 insertions, 64 deletions
diff --git a/arch/mips/kernel/cevt-r4k.c b/arch/mips/kernel/cevt-r4k.c
index 08b84d476c87..a915e5693421 100644
--- a/arch/mips/kernel/cevt-r4k.c
+++ b/arch/mips/kernel/cevt-r4k.c
@@ -10,6 +10,7 @@
10#include <linux/interrupt.h> 10#include <linux/interrupt.h>
11#include <linux/percpu.h> 11#include <linux/percpu.h>
12 12
13#include <asm/smtc_ipi.h>
13#include <asm/time.h> 14#include <asm/time.h>
14 15
15static int mips_next_event(unsigned long delta, 16static int mips_next_event(unsigned long delta,
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index ea7cfe766a8e..c4e6866d5cbc 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -40,17 +40,6 @@
40#include <irq.h> 40#include <irq.h>
41 41
42/* 42/*
43 * The integer part of the number of usecs per jiffy is taken from tick,
44 * but the fractional part is not recorded, so we calculate it using the
45 * initial value of HZ. This aids systems where tick isn't really an
46 * integer (e.g. for HZ = 128).
47 */
48#define USECS_PER_JIFFY TICK_SIZE
49#define USECS_PER_JIFFY_FRAC ((unsigned long)(u32)((1000000ULL << 32) / HZ))
50
51#define TICK_SIZE (tick_nsec / 1000)
52
53/*
54 * forward reference 43 * forward reference
55 */ 44 */
56DEFINE_SPINLOCK(rtc_lock); 45DEFINE_SPINLOCK(rtc_lock);
@@ -182,84 +171,59 @@ struct clocksource clocksource_mips = {
182 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 171 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
183}; 172};
184 173
185static void __init init_mips_clocksource(void) 174void __init clocksource_set_clock(struct clocksource *cs, unsigned int clock)
186{ 175{
187 u64 temp; 176 u64 temp;
188 u32 shift; 177 u32 shift;
189 178
190 if (!mips_hpt_frequency || clocksource_mips.read == null_hpt_read)
191 return;
192
193 /* Calclate a somewhat reasonable rating value */
194 clocksource_mips.rating = 200 + mips_hpt_frequency / 10000000;
195 /* Find a shift value */ 179 /* Find a shift value */
196 for (shift = 32; shift > 0; shift--) { 180 for (shift = 32; shift > 0; shift--) {
197 temp = (u64) NSEC_PER_SEC << shift; 181 temp = (u64) NSEC_PER_SEC << shift;
198 do_div(temp, mips_hpt_frequency); 182 do_div(temp, clock);
199 if ((temp >> 32) == 0) 183 if ((temp >> 32) == 0)
200 break; 184 break;
201 } 185 }
202 clocksource_mips.shift = shift; 186 cs->shift = shift;
203 clocksource_mips.mult = (u32)temp; 187 cs->mult = (u32) temp;
204
205 clocksource_register(&clocksource_mips);
206} 188}
207 189
208void __init __weak plat_time_init(void) 190void __cpuinit clockevent_set_clock(struct clock_event_device *cd,
191 unsigned int clock)
209{ 192{
193 u64 temp;
194 u32 shift;
195
196 /* Find a shift value */
197 for (shift = 32; shift > 0; shift--) {
198 temp = (u64) NSEC_PER_SEC << shift;
199 do_div(temp, clock);
200 if ((temp >> 32) == 0)
201 break;
202 }
203 cd->shift = shift;
204 cd->mult = (u32) temp;
210} 205}
211 206
212void __init __weak plat_timer_setup(struct irqaction *irq) 207static void __init init_mips_clocksource(void)
213{ 208{
214} 209 if (!mips_hpt_frequency || clocksource_mips.read == null_hpt_read)
210 return;
215 211
216#ifdef CONFIG_MIPS_MT_SMTC 212 /* Calclate a somewhat reasonable rating value */
217DEFINE_PER_CPU(struct clock_event_device, smtc_dummy_clockevent_device); 213 clocksource_mips.rating = 200 + mips_hpt_frequency / 10000000;
218 214
219static void smtc_set_mode(enum clock_event_mode mode, 215 clocksource_set_clock(&clocksource_mips, mips_hpt_frequency);
220 struct clock_event_device *evt) 216
221{ 217 clocksource_register(&clocksource_mips);
222} 218}
223 219
224static void mips_broadcast(cpumask_t mask) 220void __init __weak plat_time_init(void)
225{ 221{
226 unsigned int cpu;
227
228 for_each_cpu_mask(cpu, mask)
229 smtc_send_ipi(cpu, SMTC_CLOCK_TICK, 0);
230} 222}
231 223
232static void setup_smtc_dummy_clockevent_device(void) 224void __init __weak plat_timer_setup(struct irqaction *irq)
233{ 225{
234 //uint64_t mips_freq = mips_hpt_^frequency;
235 unsigned int cpu = smp_processor_id();
236 struct clock_event_device *cd;
237
238 cd = &per_cpu(smtc_dummy_clockevent_device, cpu);
239
240 cd->name = "SMTC";
241 cd->features = CLOCK_EVT_FEAT_DUMMY;
242
243 /* Calculate the min / max delta */
244 cd->mult = 0; //div_sc((unsigned long) mips_freq, NSEC_PER_SEC, 32);
245 cd->shift = 0; //32;
246 cd->max_delta_ns = 0; //clockevent_delta2ns(0x7fffffff, cd);
247 cd->min_delta_ns = 0; //clockevent_delta2ns(0x30, cd);
248
249 cd->rating = 200;
250 cd->irq = 17; //-1;
251// if (cpu)
252// cd->cpumask = CPU_MASK_ALL; // cpumask_of_cpu(cpu);
253// else
254 cd->cpumask = cpumask_of_cpu(cpu);
255
256 cd->set_mode = smtc_set_mode;
257
258 cd->broadcast = mips_broadcast;
259
260 clockevents_register_device(cd);
261} 226}
262#endif
263 227
264void __init time_init(void) 228void __init time_init(void)
265{ 229{