diff options
author | Jeff Garzik <jeff@garzik.org> | 2006-10-11 03:56:12 -0400 |
---|---|---|
committer | Jeff Garzik <jeff@garzik.org> | 2006-10-11 03:56:12 -0400 |
commit | 24fcbacedb0d83cabc6761acbecfbf751265ce52 (patch) | |
tree | 7147b206304b028c3cfd5de6317e5c8510098ca9 /arch/mips/kernel | |
parent | 2f614fe04f4463ff22234133319067d7361f54e5 (diff) | |
parent | 53a5fbdc2dff55161a206ed1a1385a8fa8055c34 (diff) |
Merge branch 'master' into upstream-fixes
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r-- | arch/mips/kernel/asm-offsets.c | 3 | ||||
-rw-r--r-- | arch/mips/kernel/cpu-probe.c | 9 | ||||
-rw-r--r-- | arch/mips/kernel/entry.S | 15 | ||||
-rw-r--r-- | arch/mips/kernel/genex.S | 7 | ||||
-rw-r--r-- | arch/mips/kernel/irq-msc01.c | 13 | ||||
-rw-r--r-- | arch/mips/kernel/irq-mv6434x.c | 9 | ||||
-rw-r--r-- | arch/mips/kernel/irq.c | 6 | ||||
-rw-r--r-- | arch/mips/kernel/proc.c | 12 | ||||
-rw-r--r-- | arch/mips/kernel/process.c | 2 | ||||
-rw-r--r-- | arch/mips/kernel/ptrace.c | 18 | ||||
-rw-r--r-- | arch/mips/kernel/ptrace32.c | 3 | ||||
-rw-r--r-- | arch/mips/kernel/rtlx.c | 6 | ||||
-rw-r--r-- | arch/mips/kernel/smp-mt.c | 16 | ||||
-rw-r--r-- | arch/mips/kernel/smp.c | 14 | ||||
-rw-r--r-- | arch/mips/kernel/smtc-asm.S | 9 | ||||
-rw-r--r-- | arch/mips/kernel/smtc.c | 26 | ||||
-rw-r--r-- | arch/mips/kernel/time.c | 25 | ||||
-rw-r--r-- | arch/mips/kernel/traps.c | 16 |
18 files changed, 114 insertions, 95 deletions
diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c index ec28077d5ee2..e9ce5b3721af 100644 --- a/arch/mips/kernel/asm-offsets.c +++ b/arch/mips/kernel/asm-offsets.c | |||
@@ -93,11 +93,12 @@ void output_thread_info_defines(void) | |||
93 | offset("#define TI_TASK ", struct thread_info, task); | 93 | offset("#define TI_TASK ", struct thread_info, task); |
94 | offset("#define TI_EXEC_DOMAIN ", struct thread_info, exec_domain); | 94 | offset("#define TI_EXEC_DOMAIN ", struct thread_info, exec_domain); |
95 | offset("#define TI_FLAGS ", struct thread_info, flags); | 95 | offset("#define TI_FLAGS ", struct thread_info, flags); |
96 | offset("#define TI_TP_VALUE ", struct thread_info, tp_value); | ||
96 | offset("#define TI_CPU ", struct thread_info, cpu); | 97 | offset("#define TI_CPU ", struct thread_info, cpu); |
97 | offset("#define TI_PRE_COUNT ", struct thread_info, preempt_count); | 98 | offset("#define TI_PRE_COUNT ", struct thread_info, preempt_count); |
98 | offset("#define TI_ADDR_LIMIT ", struct thread_info, addr_limit); | 99 | offset("#define TI_ADDR_LIMIT ", struct thread_info, addr_limit); |
99 | offset("#define TI_RESTART_BLOCK ", struct thread_info, restart_block); | 100 | offset("#define TI_RESTART_BLOCK ", struct thread_info, restart_block); |
100 | offset("#define TI_TP_VALUE ", struct thread_info, tp_value); | 101 | offset("#define TI_REGS ", struct thread_info, regs); |
101 | constant("#define _THREAD_SIZE_ORDER ", THREAD_SIZE_ORDER); | 102 | constant("#define _THREAD_SIZE_ORDER ", THREAD_SIZE_ORDER); |
102 | constant("#define _THREAD_SIZE ", THREAD_SIZE); | 103 | constant("#define _THREAD_SIZE ", THREAD_SIZE); |
103 | constant("#define _THREAD_MASK ", THREAD_MASK); | 104 | constant("#define _THREAD_MASK ", THREAD_MASK); |
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 9fbf8430c849..8485af340ee1 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c | |||
@@ -135,7 +135,6 @@ static inline void check_wait(void) | |||
135 | case CPU_R5000: | 135 | case CPU_R5000: |
136 | case CPU_NEVADA: | 136 | case CPU_NEVADA: |
137 | case CPU_RM7000: | 137 | case CPU_RM7000: |
138 | case CPU_RM9000: | ||
139 | case CPU_4KC: | 138 | case CPU_4KC: |
140 | case CPU_4KEC: | 139 | case CPU_4KEC: |
141 | case CPU_4KSC: | 140 | case CPU_4KSC: |
@@ -164,6 +163,14 @@ static inline void check_wait(void) | |||
164 | } else | 163 | } else |
165 | printk(" unavailable.\n"); | 164 | printk(" unavailable.\n"); |
166 | break; | 165 | break; |
166 | case CPU_RM9000: | ||
167 | if ((c->processor_id & 0x00ff) >= 0x40) { | ||
168 | cpu_wait = r4k_wait; | ||
169 | printk(" available.\n"); | ||
170 | } else { | ||
171 | printk(" unavailable.\n"); | ||
172 | } | ||
173 | break; | ||
167 | default: | 174 | default: |
168 | printk(" unavailable.\n"); | 175 | printk(" unavailable.\n"); |
169 | break; | 176 | break; |
diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S index 766655f35250..417c08ac76eb 100644 --- a/arch/mips/kernel/entry.S +++ b/arch/mips/kernel/entry.S | |||
@@ -20,10 +20,7 @@ | |||
20 | #include <asm/mipsmtregs.h> | 20 | #include <asm/mipsmtregs.h> |
21 | #endif | 21 | #endif |
22 | 22 | ||
23 | #ifdef CONFIG_PREEMPT | 23 | #ifndef CONFIG_PREEMPT |
24 | .macro preempt_stop | ||
25 | .endm | ||
26 | #else | ||
27 | .macro preempt_stop | 24 | .macro preempt_stop |
28 | local_irq_disable | 25 | local_irq_disable |
29 | .endm | 26 | .endm |
@@ -32,9 +29,16 @@ | |||
32 | 29 | ||
33 | .text | 30 | .text |
34 | .align 5 | 31 | .align 5 |
32 | FEXPORT(ret_from_irq) | ||
33 | LONG_S s0, TI_REGS($28) | ||
34 | #ifdef CONFIG_PREEMPT | ||
35 | FEXPORT(ret_from_exception) | ||
36 | #else | ||
37 | b _ret_from_irq | ||
35 | FEXPORT(ret_from_exception) | 38 | FEXPORT(ret_from_exception) |
36 | preempt_stop | 39 | preempt_stop |
37 | FEXPORT(ret_from_irq) | 40 | #endif |
41 | FEXPORT(_ret_from_irq) | ||
38 | LONG_L t0, PT_STATUS(sp) # returning to kernel mode? | 42 | LONG_L t0, PT_STATUS(sp) # returning to kernel mode? |
39 | andi t0, t0, KU_USER | 43 | andi t0, t0, KU_USER |
40 | beqz t0, resume_kernel | 44 | beqz t0, resume_kernel |
@@ -79,7 +83,6 @@ FEXPORT(syscall_exit) | |||
79 | FEXPORT(restore_all) # restore full frame | 83 | FEXPORT(restore_all) # restore full frame |
80 | #ifdef CONFIG_MIPS_MT_SMTC | 84 | #ifdef CONFIG_MIPS_MT_SMTC |
81 | /* Detect and execute deferred IPI "interrupts" */ | 85 | /* Detect and execute deferred IPI "interrupts" */ |
82 | move a0,sp | ||
83 | jal deferred_smtc_ipi | 86 | jal deferred_smtc_ipi |
84 | /* Re-arm any temporarily masked interrupts not explicitly "acked" */ | 87 | /* Re-arm any temporarily masked interrupts not explicitly "acked" */ |
85 | mfc0 v0, CP0_TCSTATUS | 88 | mfc0 v0, CP0_TCSTATUS |
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S index af6ef2fd8300..5baca16993d0 100644 --- a/arch/mips/kernel/genex.S +++ b/arch/mips/kernel/genex.S | |||
@@ -131,8 +131,9 @@ NESTED(handle_int, PT_SIZE, sp) | |||
131 | CLI | 131 | CLI |
132 | TRACE_IRQS_OFF | 132 | TRACE_IRQS_OFF |
133 | 133 | ||
134 | LONG_L s0, TI_REGS($28) | ||
135 | LONG_S sp, TI_REGS($28) | ||
134 | PTR_LA ra, ret_from_irq | 136 | PTR_LA ra, ret_from_irq |
135 | move a0, sp | ||
136 | j plat_irq_dispatch | 137 | j plat_irq_dispatch |
137 | END(handle_int) | 138 | END(handle_int) |
138 | 139 | ||
@@ -219,7 +220,9 @@ NESTED(except_vec_vi_handler, 0, sp) | |||
219 | #endif /* CONFIG_MIPS_MT_SMTC */ | 220 | #endif /* CONFIG_MIPS_MT_SMTC */ |
220 | CLI | 221 | CLI |
221 | TRACE_IRQS_OFF | 222 | TRACE_IRQS_OFF |
222 | move a0, sp | 223 | |
224 | LONG_L s0, TI_REGS($28) | ||
225 | LONG_S sp, TI_REGS($28) | ||
223 | PTR_LA ra, ret_from_irq | 226 | PTR_LA ra, ret_from_irq |
224 | jr v0 | 227 | jr v0 |
225 | END(except_vec_vi_handler) | 228 | END(except_vec_vi_handler) |
diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c index 63dfeb41796b..650a80ca3741 100644 --- a/arch/mips/kernel/irq-msc01.c +++ b/arch/mips/kernel/irq-msc01.c | |||
@@ -1,16 +1,17 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2004 MIPS Inc | ||
3 | * Author: chris@mips.com | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify it | 2 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of the GNU General Public License as published by the | 3 | * under the terms of the GNU General Public License as published by the |
7 | * Free Software Foundation; either version 2 of the License, or (at your | 4 | * Free Software Foundation; either version 2 of the License, or (at your |
8 | * option) any later version. | 5 | * option) any later version. |
6 | * | ||
7 | * Copyright (c) 2004 MIPS Inc | ||
8 | * Author: chris@mips.com | ||
9 | * | ||
10 | * Copyright (C) 2004, 06 Ralf Baechle <ralf@linux-mips.org> | ||
9 | */ | 11 | */ |
10 | #include <linux/module.h> | 12 | #include <linux/module.h> |
11 | #include <linux/interrupt.h> | 13 | #include <linux/interrupt.h> |
12 | #include <linux/kernel.h> | 14 | #include <linux/kernel.h> |
13 | #include <asm/ptrace.h> | ||
14 | #include <linux/sched.h> | 15 | #include <linux/sched.h> |
15 | #include <linux/kernel_stat.h> | 16 | #include <linux/kernel_stat.h> |
16 | #include <asm/io.h> | 17 | #include <asm/io.h> |
@@ -115,14 +116,14 @@ static void end_msc_irq(unsigned int irq) | |||
115 | /* | 116 | /* |
116 | * Interrupt handler for interrupts coming from SOC-it. | 117 | * Interrupt handler for interrupts coming from SOC-it. |
117 | */ | 118 | */ |
118 | void ll_msc_irq(struct pt_regs *regs) | 119 | void ll_msc_irq(void) |
119 | { | 120 | { |
120 | unsigned int irq; | 121 | unsigned int irq; |
121 | 122 | ||
122 | /* read the interrupt vector register */ | 123 | /* read the interrupt vector register */ |
123 | MSCIC_READ(MSC01_IC_VEC, irq); | 124 | MSCIC_READ(MSC01_IC_VEC, irq); |
124 | if (irq < 64) | 125 | if (irq < 64) |
125 | do_IRQ(irq + irq_base, regs); | 126 | do_IRQ(irq + irq_base); |
126 | else { | 127 | else { |
127 | /* Ignore spurious interrupt */ | 128 | /* Ignore spurious interrupt */ |
128 | } | 129 | } |
diff --git a/arch/mips/kernel/irq-mv6434x.c b/arch/mips/kernel/irq-mv6434x.c index b117e64da64d..37d106202b83 100644 --- a/arch/mips/kernel/irq-mv6434x.c +++ b/arch/mips/kernel/irq-mv6434x.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright 2002 Momentum Computer | 2 | * Copyright 2002 Momentum Computer |
3 | * Author: mdharm@momenco.com | 3 | * Author: mdharm@momenco.com |
4 | * Copyright (C) 2004 Ralf Baechle <ralf@linux-mips.org> | 4 | * Copyright (C) 2004, 06 Ralf Baechle <ralf@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 6 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms of the GNU General Public License as published by the | 7 | * under the terms of the GNU General Public License as published by the |
@@ -15,7 +15,6 @@ | |||
15 | #include <linux/mv643xx.h> | 15 | #include <linux/mv643xx.h> |
16 | #include <linux/sched.h> | 16 | #include <linux/sched.h> |
17 | 17 | ||
18 | #include <asm/ptrace.h> | ||
19 | #include <asm/io.h> | 18 | #include <asm/io.h> |
20 | #include <asm/irq.h> | 19 | #include <asm/irq.h> |
21 | #include <asm/marvell.h> | 20 | #include <asm/marvell.h> |
@@ -113,7 +112,7 @@ static void end_mv64340_irq(unsigned int irq) | |||
113 | * Interrupt handler for interrupts coming from the Marvell chip. | 112 | * Interrupt handler for interrupts coming from the Marvell chip. |
114 | * It could be built in ethernet ports etc... | 113 | * It could be built in ethernet ports etc... |
115 | */ | 114 | */ |
116 | void ll_mv64340_irq(struct pt_regs *regs) | 115 | void ll_mv64340_irq(void) |
117 | { | 116 | { |
118 | unsigned int irq_src_low, irq_src_high; | 117 | unsigned int irq_src_low, irq_src_high; |
119 | unsigned int irq_mask_low, irq_mask_high; | 118 | unsigned int irq_mask_low, irq_mask_high; |
@@ -129,9 +128,9 @@ void ll_mv64340_irq(struct pt_regs *regs) | |||
129 | irq_src_high &= irq_mask_high; | 128 | irq_src_high &= irq_mask_high; |
130 | 129 | ||
131 | if (irq_src_low) | 130 | if (irq_src_low) |
132 | do_IRQ(ls1bit32(irq_src_low) + irq_base, regs); | 131 | do_IRQ(ls1bit32(irq_src_low) + irq_base); |
133 | else | 132 | else |
134 | do_IRQ(ls1bit32(irq_src_high) + irq_base + 32, regs); | 133 | do_IRQ(ls1bit32(irq_src_high) + irq_base + 32); |
135 | } | 134 | } |
136 | 135 | ||
137 | #define shutdown_mv64340_irq disable_mv64340_irq | 136 | #define shutdown_mv64340_irq disable_mv64340_irq |
diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c index d955aaefbb8e..dd24434392b6 100644 --- a/arch/mips/kernel/irq.c +++ b/arch/mips/kernel/irq.c | |||
@@ -53,12 +53,12 @@ unsigned long irq_hwmask[NR_IRQS]; | |||
53 | * SMP cross-CPU interrupts have their own specific | 53 | * SMP cross-CPU interrupts have their own specific |
54 | * handlers). | 54 | * handlers). |
55 | */ | 55 | */ |
56 | asmlinkage unsigned int do_IRQ(unsigned int irq, struct pt_regs *regs) | 56 | asmlinkage unsigned int do_IRQ(unsigned int irq) |
57 | { | 57 | { |
58 | irq_enter(); | 58 | irq_enter(); |
59 | 59 | ||
60 | __DO_IRQ_SMTC_HOOK(); | 60 | __DO_IRQ_SMTC_HOOK(); |
61 | __do_IRQ(irq, regs); | 61 | __do_IRQ(irq); |
62 | 62 | ||
63 | irq_exit(); | 63 | irq_exit(); |
64 | 64 | ||
@@ -110,7 +110,7 @@ skip: | |||
110 | return 0; | 110 | return 0; |
111 | } | 111 | } |
112 | 112 | ||
113 | asmlinkage void spurious_interrupt(struct pt_regs *regs) | 113 | asmlinkage void spurious_interrupt(void) |
114 | { | 114 | { |
115 | atomic_inc(&irq_err_count); | 115 | atomic_inc(&irq_err_count); |
116 | } | 116 | } |
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index d8beef107902..4ed37ba19731 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c | |||
@@ -89,9 +89,9 @@ static const char *cpu_name[] = { | |||
89 | 89 | ||
90 | static int show_cpuinfo(struct seq_file *m, void *v) | 90 | static int show_cpuinfo(struct seq_file *m, void *v) |
91 | { | 91 | { |
92 | unsigned int version = current_cpu_data.processor_id; | ||
93 | unsigned int fp_vers = current_cpu_data.fpu_id; | ||
94 | unsigned long n = (unsigned long) v - 1; | 92 | unsigned long n = (unsigned long) v - 1; |
93 | unsigned int version = cpu_data[n].processor_id; | ||
94 | unsigned int fp_vers = cpu_data[n].fpu_id; | ||
95 | char fmt [64]; | 95 | char fmt [64]; |
96 | 96 | ||
97 | #ifdef CONFIG_SMP | 97 | #ifdef CONFIG_SMP |
@@ -107,9 +107,9 @@ static int show_cpuinfo(struct seq_file *m, void *v) | |||
107 | 107 | ||
108 | seq_printf(m, "processor\t\t: %ld\n", n); | 108 | seq_printf(m, "processor\t\t: %ld\n", n); |
109 | sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n", | 109 | sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n", |
110 | cpu_has_fpu ? " FPU V%d.%d" : ""); | 110 | cpu_data[n].options & MIPS_CPU_FPU ? " FPU V%d.%d" : ""); |
111 | seq_printf(m, fmt, cpu_name[current_cpu_data.cputype <= CPU_LAST ? | 111 | seq_printf(m, fmt, cpu_name[cpu_data[n].cputype <= CPU_LAST ? |
112 | current_cpu_data.cputype : CPU_UNKNOWN], | 112 | cpu_data[n].cputype : CPU_UNKNOWN], |
113 | (version >> 4) & 0x0f, version & 0x0f, | 113 | (version >> 4) & 0x0f, version & 0x0f, |
114 | (fp_vers >> 4) & 0x0f, fp_vers & 0x0f); | 114 | (fp_vers >> 4) & 0x0f, fp_vers & 0x0f); |
115 | seq_printf(m, "BogoMIPS\t\t: %lu.%02lu\n", | 115 | seq_printf(m, "BogoMIPS\t\t: %lu.%02lu\n", |
@@ -118,7 +118,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) | |||
118 | seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no"); | 118 | seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no"); |
119 | seq_printf(m, "microsecond timers\t: %s\n", | 119 | seq_printf(m, "microsecond timers\t: %s\n", |
120 | cpu_has_counter ? "yes" : "no"); | 120 | cpu_has_counter ? "yes" : "no"); |
121 | seq_printf(m, "tlb_entries\t\t: %d\n", current_cpu_data.tlbsize); | 121 | seq_printf(m, "tlb_entries\t\t: %d\n", cpu_data[n].tlbsize); |
122 | seq_printf(m, "extra interrupt vector\t: %s\n", | 122 | seq_printf(m, "extra interrupt vector\t: %s\n", |
123 | cpu_has_divec ? "yes" : "no"); | 123 | cpu_has_divec ? "yes" : "no"); |
124 | seq_printf(m, "hardware watchpoint\t: %s\n", | 124 | seq_printf(m, "hardware watchpoint\t: %s\n", |
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c index 045d987bc683..9f307eb1a31e 100644 --- a/arch/mips/kernel/process.c +++ b/arch/mips/kernel/process.c | |||
@@ -115,7 +115,7 @@ void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp) | |||
115 | status |= KU_USER; | 115 | status |= KU_USER; |
116 | regs->cp0_status = status; | 116 | regs->cp0_status = status; |
117 | clear_used_math(); | 117 | clear_used_math(); |
118 | lose_fpu(); | 118 | clear_fpu_owner(); |
119 | if (cpu_has_dsp) | 119 | if (cpu_has_dsp) |
120 | __init_dsp(); | 120 | __init_dsp(); |
121 | regs->cp0_epc = pc; | 121 | regs->cp0_epc = pc; |
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c index 362d1728e531..258d74fd0b63 100644 --- a/arch/mips/kernel/ptrace.c +++ b/arch/mips/kernel/ptrace.c | |||
@@ -106,6 +106,7 @@ int ptrace_setregs (struct task_struct *child, __s64 __user *data) | |||
106 | int ptrace_getfpregs (struct task_struct *child, __u32 __user *data) | 106 | int ptrace_getfpregs (struct task_struct *child, __u32 __user *data) |
107 | { | 107 | { |
108 | int i; | 108 | int i; |
109 | unsigned int tmp; | ||
109 | 110 | ||
110 | if (!access_ok(VERIFY_WRITE, data, 33 * 8)) | 111 | if (!access_ok(VERIFY_WRITE, data, 33 * 8)) |
111 | return -EIO; | 112 | return -EIO; |
@@ -121,10 +122,10 @@ int ptrace_getfpregs (struct task_struct *child, __u32 __user *data) | |||
121 | 122 | ||
122 | __put_user (child->thread.fpu.fcr31, data + 64); | 123 | __put_user (child->thread.fpu.fcr31, data + 64); |
123 | 124 | ||
125 | preempt_disable(); | ||
124 | if (cpu_has_fpu) { | 126 | if (cpu_has_fpu) { |
125 | unsigned int flags, tmp; | 127 | unsigned int flags; |
126 | 128 | ||
127 | preempt_disable(); | ||
128 | if (cpu_has_mipsmt) { | 129 | if (cpu_has_mipsmt) { |
129 | unsigned int vpflags = dvpe(); | 130 | unsigned int vpflags = dvpe(); |
130 | flags = read_c0_status(); | 131 | flags = read_c0_status(); |
@@ -138,11 +139,11 @@ int ptrace_getfpregs (struct task_struct *child, __u32 __user *data) | |||
138 | __asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp)); | 139 | __asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp)); |
139 | write_c0_status(flags); | 140 | write_c0_status(flags); |
140 | } | 141 | } |
141 | preempt_enable(); | ||
142 | __put_user (tmp, data + 65); | ||
143 | } else { | 142 | } else { |
144 | __put_user ((__u32) 0, data + 65); | 143 | tmp = 0; |
145 | } | 144 | } |
145 | preempt_enable(); | ||
146 | __put_user (tmp, data + 65); | ||
146 | 147 | ||
147 | return 0; | 148 | return 0; |
148 | } | 149 | } |
@@ -245,16 +246,17 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) | |||
245 | unsigned int mtflags; | 246 | unsigned int mtflags; |
246 | #endif /* CONFIG_MIPS_MT_SMTC */ | 247 | #endif /* CONFIG_MIPS_MT_SMTC */ |
247 | 248 | ||
248 | if (!cpu_has_fpu) | 249 | preempt_disable(); |
250 | if (!cpu_has_fpu) { | ||
251 | preempt_enable(); | ||
249 | break; | 252 | break; |
253 | } | ||
250 | 254 | ||
251 | #ifdef CONFIG_MIPS_MT_SMTC | 255 | #ifdef CONFIG_MIPS_MT_SMTC |
252 | /* Read-modify-write of Status must be atomic */ | 256 | /* Read-modify-write of Status must be atomic */ |
253 | local_irq_save(irqflags); | 257 | local_irq_save(irqflags); |
254 | mtflags = dmt(); | 258 | mtflags = dmt(); |
255 | #endif /* CONFIG_MIPS_MT_SMTC */ | 259 | #endif /* CONFIG_MIPS_MT_SMTC */ |
256 | |||
257 | preempt_disable(); | ||
258 | if (cpu_has_mipsmt) { | 260 | if (cpu_has_mipsmt) { |
259 | unsigned int vpflags = dvpe(); | 261 | unsigned int vpflags = dvpe(); |
260 | flags = read_c0_status(); | 262 | flags = read_c0_status(); |
diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c index f40ecd8be05f..d9a39c169450 100644 --- a/arch/mips/kernel/ptrace32.c +++ b/arch/mips/kernel/ptrace32.c | |||
@@ -175,7 +175,9 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data) | |||
175 | unsigned int mtflags; | 175 | unsigned int mtflags; |
176 | #endif /* CONFIG_MIPS_MT_SMTC */ | 176 | #endif /* CONFIG_MIPS_MT_SMTC */ |
177 | 177 | ||
178 | preempt_disable(); | ||
178 | if (!cpu_has_fpu) { | 179 | if (!cpu_has_fpu) { |
180 | preempt_enable(); | ||
179 | tmp = 0; | 181 | tmp = 0; |
180 | break; | 182 | break; |
181 | } | 183 | } |
@@ -186,7 +188,6 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data) | |||
186 | mtflags = dmt(); | 188 | mtflags = dmt(); |
187 | #endif /* CONFIG_MIPS_MT_SMTC */ | 189 | #endif /* CONFIG_MIPS_MT_SMTC */ |
188 | 190 | ||
189 | preempt_disable(); | ||
190 | if (cpu_has_mipsmt) { | 191 | if (cpu_has_mipsmt) { |
191 | unsigned int vpflags = dvpe(); | 192 | unsigned int vpflags = dvpe(); |
192 | flags = read_c0_status(); | 193 | flags = read_c0_status(); |
diff --git a/arch/mips/kernel/rtlx.c b/arch/mips/kernel/rtlx.c index cdab1b2cd134..8c8c8324f775 100644 --- a/arch/mips/kernel/rtlx.c +++ b/arch/mips/kernel/rtlx.c | |||
@@ -61,16 +61,16 @@ static int sp_stopping = 0; | |||
61 | 61 | ||
62 | extern void *vpe_get_shared(int index); | 62 | extern void *vpe_get_shared(int index); |
63 | 63 | ||
64 | static void rtlx_dispatch(struct pt_regs *regs) | 64 | static void rtlx_dispatch(void) |
65 | { | 65 | { |
66 | do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_RTLX_IRQ, regs); | 66 | do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_RTLX_IRQ); |
67 | } | 67 | } |
68 | 68 | ||
69 | 69 | ||
70 | /* Interrupt handler may be called before rtlx_init has otherwise had | 70 | /* Interrupt handler may be called before rtlx_init has otherwise had |
71 | a chance to run. | 71 | a chance to run. |
72 | */ | 72 | */ |
73 | static irqreturn_t rtlx_interrupt(int irq, void *dev_id, struct pt_regs *regs) | 73 | static irqreturn_t rtlx_interrupt(int irq, void *dev_id) |
74 | { | 74 | { |
75 | int i; | 75 | int i; |
76 | 76 | ||
diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c index 766253c44f3f..3b5f3b632622 100644 --- a/arch/mips/kernel/smp-mt.c +++ b/arch/mips/kernel/smp-mt.c | |||
@@ -106,22 +106,22 @@ void __init sanitize_tlb_entries(void) | |||
106 | clear_c0_mvpcontrol(MVPCONTROL_VPC); | 106 | clear_c0_mvpcontrol(MVPCONTROL_VPC); |
107 | } | 107 | } |
108 | 108 | ||
109 | static void ipi_resched_dispatch (struct pt_regs *regs) | 109 | static void ipi_resched_dispatch(void) |
110 | { | 110 | { |
111 | do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ, regs); | 111 | do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ); |
112 | } | 112 | } |
113 | 113 | ||
114 | static void ipi_call_dispatch (struct pt_regs *regs) | 114 | static void ipi_call_dispatch(void) |
115 | { | 115 | { |
116 | do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_IPI_CALL_IRQ, regs); | 116 | do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_IPI_CALL_IRQ); |
117 | } | 117 | } |
118 | 118 | ||
119 | irqreturn_t ipi_resched_interrupt(int irq, void *dev_id, struct pt_regs *regs) | 119 | static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id) |
120 | { | 120 | { |
121 | return IRQ_HANDLED; | 121 | return IRQ_HANDLED; |
122 | } | 122 | } |
123 | 123 | ||
124 | irqreturn_t ipi_call_interrupt(int irq, void *dev_id, struct pt_regs *regs) | 124 | static irqreturn_t ipi_call_interrupt(int irq, void *dev_id) |
125 | { | 125 | { |
126 | smp_call_function_interrupt(); | 126 | smp_call_function_interrupt(); |
127 | 127 | ||
@@ -250,8 +250,8 @@ void __init plat_prepare_cpus(unsigned int max_cpus) | |||
250 | { | 250 | { |
251 | /* set up ipi interrupts */ | 251 | /* set up ipi interrupts */ |
252 | if (cpu_has_vint) { | 252 | if (cpu_has_vint) { |
253 | set_vi_handler (MIPS_CPU_IPI_RESCHED_IRQ, ipi_resched_dispatch); | 253 | set_vi_handler(MIPS_CPU_IPI_RESCHED_IRQ, ipi_resched_dispatch); |
254 | set_vi_handler (MIPS_CPU_IPI_CALL_IRQ, ipi_call_dispatch); | 254 | set_vi_handler(MIPS_CPU_IPI_CALL_IRQ, ipi_call_dispatch); |
255 | } | 255 | } |
256 | 256 | ||
257 | cpu_ipi_resched_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ; | 257 | cpu_ipi_resched_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ; |
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c index 221895802dca..1af3612a1ce8 100644 --- a/arch/mips/kernel/smp.c +++ b/arch/mips/kernel/smp.c | |||
@@ -467,14 +467,18 @@ static DEFINE_PER_CPU(struct cpu, cpu_devices); | |||
467 | 467 | ||
468 | static int __init topology_init(void) | 468 | static int __init topology_init(void) |
469 | { | 469 | { |
470 | int cpu; | 470 | int i, ret; |
471 | int ret; | ||
472 | 471 | ||
473 | for_each_present_cpu(cpu) { | 472 | #ifdef CONFIG_NUMA |
474 | ret = register_cpu(&per_cpu(cpu_devices, cpu), cpu); | 473 | for_each_online_node(i) |
474 | register_one_node(i); | ||
475 | #endif /* CONFIG_NUMA */ | ||
476 | |||
477 | for_each_present_cpu(i) { | ||
478 | ret = register_cpu(&per_cpu(cpu_devices, i), i); | ||
475 | if (ret) | 479 | if (ret) |
476 | printk(KERN_WARNING "topology_init: register_cpu %d " | 480 | printk(KERN_WARNING "topology_init: register_cpu %d " |
477 | "failed (%d)\n", cpu, ret); | 481 | "failed (%d)\n", i, ret); |
478 | } | 482 | } |
479 | 483 | ||
480 | return 0; | 484 | return 0; |
diff --git a/arch/mips/kernel/smtc-asm.S b/arch/mips/kernel/smtc-asm.S index 76cb31d57482..1cb9441f1474 100644 --- a/arch/mips/kernel/smtc-asm.S +++ b/arch/mips/kernel/smtc-asm.S | |||
@@ -97,15 +97,12 @@ FEXPORT(__smtc_ipi_vector) | |||
97 | SAVE_ALL | 97 | SAVE_ALL |
98 | CLI | 98 | CLI |
99 | TRACE_IRQS_OFF | 99 | TRACE_IRQS_OFF |
100 | move a0,sp | ||
101 | /* Function to be invoked passed stack pad slot 5 */ | 100 | /* Function to be invoked passed stack pad slot 5 */ |
102 | lw t0,PT_PADSLOT5(sp) | 101 | lw t0,PT_PADSLOT5(sp) |
103 | /* Argument from sender passed in stack pad slot 4 */ | 102 | /* Argument from sender passed in stack pad slot 4 */ |
104 | lw a1,PT_PADSLOT4(sp) | 103 | lw a0,PT_PADSLOT4(sp) |
105 | jalr t0 | 104 | PTR_LA ra, _ret_from_irq |
106 | nop | 105 | jr t0 |
107 | j ret_from_irq | ||
108 | nop | ||
109 | 106 | ||
110 | /* | 107 | /* |
111 | * Called from idle loop to provoke processing of queued IPIs | 108 | * Called from idle loop to provoke processing of queued IPIs |
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c index 604bcc5cb7c8..cc1f7474f7d7 100644 --- a/arch/mips/kernel/smtc.c +++ b/arch/mips/kernel/smtc.c | |||
@@ -82,7 +82,7 @@ struct smtc_ipi_q freeIPIq; | |||
82 | 82 | ||
83 | /* Forward declarations */ | 83 | /* Forward declarations */ |
84 | 84 | ||
85 | void ipi_decode(struct pt_regs *, struct smtc_ipi *); | 85 | void ipi_decode(struct smtc_ipi *); |
86 | void post_direct_ipi(int cpu, struct smtc_ipi *pipi); | 86 | void post_direct_ipi(int cpu, struct smtc_ipi *pipi); |
87 | void setup_cross_vpe_interrupts(void); | 87 | void setup_cross_vpe_interrupts(void); |
88 | void init_smtc_stats(void); | 88 | void init_smtc_stats(void); |
@@ -820,19 +820,19 @@ void post_direct_ipi(int cpu, struct smtc_ipi *pipi) | |||
820 | write_tc_c0_tcrestart(__smtc_ipi_vector); | 820 | write_tc_c0_tcrestart(__smtc_ipi_vector); |
821 | } | 821 | } |
822 | 822 | ||
823 | void ipi_resched_interrupt(struct pt_regs *regs) | 823 | static void ipi_resched_interrupt(void) |
824 | { | 824 | { |
825 | /* Return from interrupt should be enough to cause scheduler check */ | 825 | /* Return from interrupt should be enough to cause scheduler check */ |
826 | } | 826 | } |
827 | 827 | ||
828 | 828 | ||
829 | void ipi_call_interrupt(struct pt_regs *regs) | 829 | static void ipi_call_interrupt(void) |
830 | { | 830 | { |
831 | /* Invoke generic function invocation code in smp.c */ | 831 | /* Invoke generic function invocation code in smp.c */ |
832 | smp_call_function_interrupt(); | 832 | smp_call_function_interrupt(); |
833 | } | 833 | } |
834 | 834 | ||
835 | void ipi_decode(struct pt_regs *regs, struct smtc_ipi *pipi) | 835 | void ipi_decode(struct smtc_ipi *pipi) |
836 | { | 836 | { |
837 | void *arg_copy = pipi->arg; | 837 | void *arg_copy = pipi->arg; |
838 | int type_copy = pipi->type; | 838 | int type_copy = pipi->type; |
@@ -846,15 +846,15 @@ void ipi_decode(struct pt_regs *regs, struct smtc_ipi *pipi) | |||
846 | #ifdef SMTC_IDLE_HOOK_DEBUG | 846 | #ifdef SMTC_IDLE_HOOK_DEBUG |
847 | clock_hang_reported[dest_copy] = 0; | 847 | clock_hang_reported[dest_copy] = 0; |
848 | #endif /* SMTC_IDLE_HOOK_DEBUG */ | 848 | #endif /* SMTC_IDLE_HOOK_DEBUG */ |
849 | local_timer_interrupt(0, NULL, regs); | 849 | local_timer_interrupt(0, NULL); |
850 | break; | 850 | break; |
851 | case LINUX_SMP_IPI: | 851 | case LINUX_SMP_IPI: |
852 | switch ((int)arg_copy) { | 852 | switch ((int)arg_copy) { |
853 | case SMP_RESCHEDULE_YOURSELF: | 853 | case SMP_RESCHEDULE_YOURSELF: |
854 | ipi_resched_interrupt(regs); | 854 | ipi_resched_interrupt(); |
855 | break; | 855 | break; |
856 | case SMP_CALL_FUNCTION: | 856 | case SMP_CALL_FUNCTION: |
857 | ipi_call_interrupt(regs); | 857 | ipi_call_interrupt(); |
858 | break; | 858 | break; |
859 | default: | 859 | default: |
860 | printk("Impossible SMTC IPI Argument 0x%x\n", | 860 | printk("Impossible SMTC IPI Argument 0x%x\n", |
@@ -868,7 +868,7 @@ void ipi_decode(struct pt_regs *regs, struct smtc_ipi *pipi) | |||
868 | } | 868 | } |
869 | } | 869 | } |
870 | 870 | ||
871 | void deferred_smtc_ipi(struct pt_regs *regs) | 871 | void deferred_smtc_ipi(void) |
872 | { | 872 | { |
873 | struct smtc_ipi *pipi; | 873 | struct smtc_ipi *pipi; |
874 | unsigned long flags; | 874 | unsigned long flags; |
@@ -883,7 +883,7 @@ void deferred_smtc_ipi(struct pt_regs *regs) | |||
883 | while((pipi = smtc_ipi_dq(&IPIQ[q])) != NULL) { | 883 | while((pipi = smtc_ipi_dq(&IPIQ[q])) != NULL) { |
884 | /* ipi_decode() should be called with interrupts off */ | 884 | /* ipi_decode() should be called with interrupts off */ |
885 | local_irq_save(flags); | 885 | local_irq_save(flags); |
886 | ipi_decode(regs, pipi); | 886 | ipi_decode(pipi); |
887 | local_irq_restore(flags); | 887 | local_irq_restore(flags); |
888 | } | 888 | } |
889 | } | 889 | } |
@@ -917,7 +917,7 @@ void smtc_timer_broadcast(int vpe) | |||
917 | 917 | ||
918 | static int cpu_ipi_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_IRQ; | 918 | static int cpu_ipi_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_IRQ; |
919 | 919 | ||
920 | static irqreturn_t ipi_interrupt(int irq, void *dev_idm, struct pt_regs *regs) | 920 | static irqreturn_t ipi_interrupt(int irq, void *dev_idm) |
921 | { | 921 | { |
922 | int my_vpe = cpu_data[smp_processor_id()].vpe_id; | 922 | int my_vpe = cpu_data[smp_processor_id()].vpe_id; |
923 | int my_tc = cpu_data[smp_processor_id()].tc_id; | 923 | int my_tc = cpu_data[smp_processor_id()].tc_id; |
@@ -978,7 +978,7 @@ static irqreturn_t ipi_interrupt(int irq, void *dev_idm, struct pt_regs *regs) | |||
978 | * with interrupts off | 978 | * with interrupts off |
979 | */ | 979 | */ |
980 | local_irq_save(flags); | 980 | local_irq_save(flags); |
981 | ipi_decode(regs, pipi); | 981 | ipi_decode(pipi); |
982 | local_irq_restore(flags); | 982 | local_irq_restore(flags); |
983 | } | 983 | } |
984 | } | 984 | } |
@@ -987,9 +987,9 @@ static irqreturn_t ipi_interrupt(int irq, void *dev_idm, struct pt_regs *regs) | |||
987 | return IRQ_HANDLED; | 987 | return IRQ_HANDLED; |
988 | } | 988 | } |
989 | 989 | ||
990 | static void ipi_irq_dispatch(struct pt_regs *regs) | 990 | static void ipi_irq_dispatch(void) |
991 | { | 991 | { |
992 | do_IRQ(cpu_ipi_irq, regs); | 992 | do_IRQ(cpu_ipi_irq); |
993 | } | 993 | } |
994 | 994 | ||
995 | static struct irqaction irq_ipi; | 995 | static struct irqaction irq_ipi; |
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c index a8340802f2d7..debe86c2f691 100644 --- a/arch/mips/kernel/time.c +++ b/arch/mips/kernel/time.c | |||
@@ -322,18 +322,17 @@ static long last_rtc_update; | |||
322 | * a broadcasted inter-processor interrupt which itself is triggered | 322 | * a broadcasted inter-processor interrupt which itself is triggered |
323 | * by the global timer interrupt. | 323 | * by the global timer interrupt. |
324 | */ | 324 | */ |
325 | void local_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) | 325 | void local_timer_interrupt(int irq, void *dev_id) |
326 | { | 326 | { |
327 | if (current->pid) | 327 | profile_tick(CPU_PROFILING); |
328 | profile_tick(CPU_PROFILING, regs); | 328 | update_process_times(user_mode(get_irq_regs())); |
329 | update_process_times(user_mode(regs)); | ||
330 | } | 329 | } |
331 | 330 | ||
332 | /* | 331 | /* |
333 | * High-level timer interrupt service routines. This function | 332 | * High-level timer interrupt service routines. This function |
334 | * is set as irqaction->handler and is invoked through do_IRQ. | 333 | * is set as irqaction->handler and is invoked through do_IRQ. |
335 | */ | 334 | */ |
336 | irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) | 335 | irqreturn_t timer_interrupt(int irq, void *dev_id) |
337 | { | 336 | { |
338 | unsigned long j; | 337 | unsigned long j; |
339 | unsigned int count; | 338 | unsigned int count; |
@@ -419,22 +418,22 @@ irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
419 | * In SMP mode, local_timer_interrupt() is invoked by appropriate | 418 | * In SMP mode, local_timer_interrupt() is invoked by appropriate |
420 | * low-level local timer interrupt handler. | 419 | * low-level local timer interrupt handler. |
421 | */ | 420 | */ |
422 | local_timer_interrupt(irq, dev_id, regs); | 421 | local_timer_interrupt(irq, dev_id); |
423 | 422 | ||
424 | return IRQ_HANDLED; | 423 | return IRQ_HANDLED; |
425 | } | 424 | } |
426 | 425 | ||
427 | int null_perf_irq(struct pt_regs *regs) | 426 | int null_perf_irq(void) |
428 | { | 427 | { |
429 | return 0; | 428 | return 0; |
430 | } | 429 | } |
431 | 430 | ||
432 | int (*perf_irq)(struct pt_regs *regs) = null_perf_irq; | 431 | int (*perf_irq)(void) = null_perf_irq; |
433 | 432 | ||
434 | EXPORT_SYMBOL(null_perf_irq); | 433 | EXPORT_SYMBOL(null_perf_irq); |
435 | EXPORT_SYMBOL(perf_irq); | 434 | EXPORT_SYMBOL(perf_irq); |
436 | 435 | ||
437 | asmlinkage void ll_timer_interrupt(int irq, struct pt_regs *regs) | 436 | asmlinkage void ll_timer_interrupt(int irq) |
438 | { | 437 | { |
439 | int r2 = cpu_has_mips_r2; | 438 | int r2 = cpu_has_mips_r2; |
440 | 439 | ||
@@ -448,25 +447,25 @@ asmlinkage void ll_timer_interrupt(int irq, struct pt_regs *regs) | |||
448 | * performance counter interrupt handler anyway. | 447 | * performance counter interrupt handler anyway. |
449 | */ | 448 | */ |
450 | if (!r2 || (read_c0_cause() & (1 << 26))) | 449 | if (!r2 || (read_c0_cause() & (1 << 26))) |
451 | if (perf_irq(regs)) | 450 | if (perf_irq()) |
452 | goto out; | 451 | goto out; |
453 | 452 | ||
454 | /* we keep interrupt disabled all the time */ | 453 | /* we keep interrupt disabled all the time */ |
455 | if (!r2 || (read_c0_cause() & (1 << 30))) | 454 | if (!r2 || (read_c0_cause() & (1 << 30))) |
456 | timer_interrupt(irq, NULL, regs); | 455 | timer_interrupt(irq, NULL); |
457 | 456 | ||
458 | out: | 457 | out: |
459 | irq_exit(); | 458 | irq_exit(); |
460 | } | 459 | } |
461 | 460 | ||
462 | asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs) | 461 | asmlinkage void ll_local_timer_interrupt(int irq) |
463 | { | 462 | { |
464 | irq_enter(); | 463 | irq_enter(); |
465 | if (smp_processor_id() != 0) | 464 | if (smp_processor_id() != 0) |
466 | kstat_this_cpu.irqs[irq]++; | 465 | kstat_this_cpu.irqs[irq]++; |
467 | 466 | ||
468 | /* we keep interrupt disabled all the time */ | 467 | /* we keep interrupt disabled all the time */ |
469 | local_timer_interrupt(irq, NULL, regs); | 468 | local_timer_interrupt(irq, NULL); |
470 | 469 | ||
471 | irq_exit(); | 470 | irq_exit(); |
472 | } | 471 | } |
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index b7292a56d4cd..cce8313ec27d 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c | |||
@@ -66,7 +66,7 @@ extern asmlinkage void handle_mcheck(void); | |||
66 | extern asmlinkage void handle_reserved(void); | 66 | extern asmlinkage void handle_reserved(void); |
67 | 67 | ||
68 | extern int fpu_emulator_cop1Handler(struct pt_regs *xcp, | 68 | extern int fpu_emulator_cop1Handler(struct pt_regs *xcp, |
69 | struct mips_fpu_struct *ctx); | 69 | struct mips_fpu_struct *ctx, int has_fpu); |
70 | 70 | ||
71 | void (*board_be_init)(void); | 71 | void (*board_be_init)(void); |
72 | int (*board_be_handler)(struct pt_regs *regs, int is_fixup); | 72 | int (*board_be_handler)(struct pt_regs *regs, int is_fixup); |
@@ -641,7 +641,7 @@ asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31) | |||
641 | preempt_enable(); | 641 | preempt_enable(); |
642 | 642 | ||
643 | /* Run the emulator */ | 643 | /* Run the emulator */ |
644 | sig = fpu_emulator_cop1Handler (regs, ¤t->thread.fpu); | 644 | sig = fpu_emulator_cop1Handler (regs, ¤t->thread.fpu, 1); |
645 | 645 | ||
646 | preempt_disable(); | 646 | preempt_disable(); |
647 | 647 | ||
@@ -791,11 +791,13 @@ asmlinkage void do_cpu(struct pt_regs *regs) | |||
791 | set_used_math(); | 791 | set_used_math(); |
792 | } | 792 | } |
793 | 793 | ||
794 | preempt_enable(); | 794 | if (cpu_has_fpu) { |
795 | 795 | preempt_enable(); | |
796 | if (!cpu_has_fpu) { | 796 | } else { |
797 | int sig = fpu_emulator_cop1Handler(regs, | 797 | int sig; |
798 | ¤t->thread.fpu); | 798 | preempt_enable(); |
799 | sig = fpu_emulator_cop1Handler(regs, | ||
800 | ¤t->thread.fpu, 0); | ||
799 | if (sig) | 801 | if (sig) |
800 | force_sig(sig, current); | 802 | force_sig(sig, current); |
801 | #ifdef CONFIG_MIPS_MT_FPAFF | 803 | #ifdef CONFIG_MIPS_MT_FPAFF |