diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2006-02-23 07:23:27 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2006-02-27 12:30:36 -0500 |
commit | 9b6695a8adfe0916e81ddd810a5b9db3eb8b0e46 (patch) | |
tree | 62ba9475530c88ccf2149cd58eabd97ebe096aca /arch/mips/kernel | |
parent | 3e6cb2d38a9c9758170813497a860c64543643d5 (diff) |
[MIPS] SMP: Fix initialization order bug.
A recent change requires cpu_possible_map to be initialized before
smp_sched_init() but most MIPS platforms were initializing their
processors in the prom_prepare_cpus callback of smp_prepare_cpus. The
simple fix of calling prom_prepare_cpus from one of the earlier SMP
initialization hooks doesn't work well either since IPIs may require
init_IRQ() to have completed, so bit the bullet and split
prom_prepare_cpus into two initialization functions, plat_smp_setup
which is called early from setup_arch and plat_prepare_cpus called where
prom_prepare_cpus used to be called.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r-- | arch/mips/kernel/setup.c | 3 | ||||
-rw-r--r-- | arch/mips/kernel/smp.c | 2 | ||||
-rw-r--r-- | arch/mips/kernel/smp_mt.c | 13 |
3 files changed, 11 insertions, 7 deletions
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index d86affa21278..d9293c558e41 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c | |||
@@ -540,6 +540,9 @@ void __init setup_arch(char **cmdline_p) | |||
540 | sparse_init(); | 540 | sparse_init(); |
541 | paging_init(); | 541 | paging_init(); |
542 | resource_init(); | 542 | resource_init(); |
543 | #ifdef CONFIG_SMP | ||
544 | plat_smp_setup(); | ||
545 | #endif | ||
543 | } | 546 | } |
544 | 547 | ||
545 | int __init fpu_disable(char *s) | 548 | int __init fpu_disable(char *s) |
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c index 5e189862e523..06ed90752424 100644 --- a/arch/mips/kernel/smp.c +++ b/arch/mips/kernel/smp.c | |||
@@ -236,7 +236,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus) | |||
236 | init_new_context(current, &init_mm); | 236 | init_new_context(current, &init_mm); |
237 | current_thread_info()->cpu = 0; | 237 | current_thread_info()->cpu = 0; |
238 | smp_tune_scheduling(); | 238 | smp_tune_scheduling(); |
239 | prom_prepare_cpus(max_cpus); | 239 | plat_prepare_cpus(max_cpus); |
240 | } | 240 | } |
241 | 241 | ||
242 | /* preload SMP state for boot cpu */ | 242 | /* preload SMP state for boot cpu */ |
diff --git a/arch/mips/kernel/smp_mt.c b/arch/mips/kernel/smp_mt.c index c930364830d0..993b8bf56aaf 100644 --- a/arch/mips/kernel/smp_mt.c +++ b/arch/mips/kernel/smp_mt.c | |||
@@ -143,7 +143,7 @@ static struct irqaction irq_call = { | |||
143 | * Make sure all CPU's are in a sensible state before we boot any of the | 143 | * Make sure all CPU's are in a sensible state before we boot any of the |
144 | * secondarys | 144 | * secondarys |
145 | */ | 145 | */ |
146 | void prom_prepare_cpus(unsigned int max_cpus) | 146 | void plat_smp_setup(void) |
147 | { | 147 | { |
148 | unsigned long val; | 148 | unsigned long val; |
149 | int i, num; | 149 | int i, num; |
@@ -179,11 +179,9 @@ void prom_prepare_cpus(unsigned int max_cpus) | |||
179 | write_vpe_c0_vpeconf0(tmp); | 179 | write_vpe_c0_vpeconf0(tmp); |
180 | 180 | ||
181 | /* Record this as available CPU */ | 181 | /* Record this as available CPU */ |
182 | if (i < max_cpus) { | 182 | cpu_set(i, phys_cpu_present_map); |
183 | cpu_set(i, phys_cpu_present_map); | 183 | __cpu_number_map[i] = ++num; |
184 | __cpu_number_map[i] = ++num; | 184 | __cpu_logical_map[num] = i; |
185 | __cpu_logical_map[num] = i; | ||
186 | } | ||
187 | } | 185 | } |
188 | 186 | ||
189 | /* disable multi-threading with TC's */ | 187 | /* disable multi-threading with TC's */ |
@@ -241,7 +239,10 @@ void prom_prepare_cpus(unsigned int max_cpus) | |||
241 | set_vi_handler (MIPS_CPU_IPI_RESCHED_IRQ, ipi_resched_dispatch); | 239 | set_vi_handler (MIPS_CPU_IPI_RESCHED_IRQ, ipi_resched_dispatch); |
242 | set_vi_handler (MIPS_CPU_IPI_CALL_IRQ, ipi_call_dispatch); | 240 | set_vi_handler (MIPS_CPU_IPI_CALL_IRQ, ipi_call_dispatch); |
243 | } | 241 | } |
242 | } | ||
244 | 243 | ||
244 | void __init plat_prepare_cpus(unsigned int max_cpus) | ||
245 | { | ||
245 | cpu_ipi_resched_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ; | 246 | cpu_ipi_resched_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ; |
246 | cpu_ipi_call_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_CALL_IRQ; | 247 | cpu_ipi_call_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_CALL_IRQ; |
247 | 248 | ||