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authorKevin D. Kissell <kevink@mips.com>2007-07-12 11:21:08 -0400
committerRalf Baechle <ralf@linux-mips.org>2007-07-12 12:41:17 -0400
commit0db34215c7e0ef618e7b29fbf271194ca5434f8e (patch)
tree261d8cd77fad2d661157ee5e5bde8e3fdc8c96b9 /arch/mips/kernel
parentbd0765098bf22eb8b1319f649a4c3301b40ec04c (diff)
[MIPS] SMTC: Interrupt mask backstop hack
To support multiple TC microthreads acting as "CPUs" within a VPE, VPE-wide interrupt mask bits must be specially manipulated during interrupt handling. To support legacy drivers and interrupt controller management code, SMTC has a "backstop" to track and if necessary restore the interrupt mask. This has some performance impact on interrupt service overhead. Disable it only if you know what you are doing. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r--arch/mips/kernel/entry.S2
-rw-r--r--arch/mips/kernel/genex.S2
2 files changed, 4 insertions, 0 deletions
diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S
index 686249c5c328..e29598ae939d 100644
--- a/arch/mips/kernel/entry.S
+++ b/arch/mips/kernel/entry.S
@@ -84,6 +84,7 @@ FEXPORT(restore_all) # restore full frame
84 LONG_S sp, TI_REGS($28) 84 LONG_S sp, TI_REGS($28)
85 jal deferred_smtc_ipi 85 jal deferred_smtc_ipi
86 LONG_S s0, TI_REGS($28) 86 LONG_S s0, TI_REGS($28)
87#ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP
87/* Re-arm any temporarily masked interrupts not explicitly "acked" */ 88/* Re-arm any temporarily masked interrupts not explicitly "acked" */
88 mfc0 v0, CP0_TCSTATUS 89 mfc0 v0, CP0_TCSTATUS
89 ori v1, v0, TCSTATUS_IXMT 90 ori v1, v0, TCSTATUS_IXMT
@@ -110,6 +111,7 @@ FEXPORT(restore_all) # restore full frame
110 _ehb 111 _ehb
111 xor t0, t0, t3 112 xor t0, t0, t3
112 mtc0 t0, CP0_TCCONTEXT 113 mtc0 t0, CP0_TCCONTEXT
114#endif /* CONFIG_MIPS_MT_SMTC_IM_BACKSTOP */
113#endif /* CONFIG_MIPS_MT_SMTC */ 115#endif /* CONFIG_MIPS_MT_SMTC */
114 .set noat 116 .set noat
115 RESTORE_TEMP 117 RESTORE_TEMP
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
index 297bd56c2347..c0f19d638b98 100644
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -243,9 +243,11 @@ NESTED(except_vec_vi_handler, 0, sp)
243 */ 243 */
244 mfc0 t1, CP0_STATUS 244 mfc0 t1, CP0_STATUS
245 and t0, a0, t1 245 and t0, a0, t1
246#ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP
246 mfc0 t2, CP0_TCCONTEXT 247 mfc0 t2, CP0_TCCONTEXT
247 or t0, t0, t2 248 or t0, t0, t2
248 mtc0 t0, CP0_TCCONTEXT 249 mtc0 t0, CP0_TCCONTEXT
250#endif /* CONFIG_MIPS_MT_SMTC_IM_BACKSTOP */
249 xor t1, t1, t0 251 xor t1, t1, t0
250 mtc0 t1, CP0_STATUS 252 mtc0 t1, CP0_STATUS
251 _ehb 253 _ehb