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authorLinus Torvalds <torvalds@linux-foundation.org>2008-09-06 22:32:21 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2008-09-06 22:32:21 -0400
commita22a9a90cfbcc91c3e0f8dc8549535e2786d3e7e (patch)
tree799e60e111e2f5179c7ffd81483abd1d2397003b /arch/mips/kernel
parent70bb08962ea9bd50797ae9f16b2493f5f7c65053 (diff)
parent0011036beeffeada15acd1936d67988de21ca65e (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: [MIPS] Probe initrd header only if explicitly specified [MIPS] TX39xx: Add missing local_flush_icache_range initialization [MIPS] TXx9: Fix txx9_pcode initialization [MIPS] Fix WARNING: at kernel/smp.c:290 [MIPS] Fix data bus error recovery
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r--arch/mips/kernel/setup.c33
-rw-r--r--arch/mips/kernel/traps.c18
2 files changed, 29 insertions, 22 deletions
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index 2aae76bce293..16f8edfe5cdc 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -160,30 +160,33 @@ early_param("rd_size", rd_size_early);
160static unsigned long __init init_initrd(void) 160static unsigned long __init init_initrd(void)
161{ 161{
162 unsigned long end; 162 unsigned long end;
163 u32 *initrd_header;
164 163
165 /* 164 /*
166 * Board specific code or command line parser should have 165 * Board specific code or command line parser should have
167 * already set up initrd_start and initrd_end. In these cases 166 * already set up initrd_start and initrd_end. In these cases
168 * perfom sanity checks and use them if all looks good. 167 * perfom sanity checks and use them if all looks good.
169 */ 168 */
170 if (initrd_start && initrd_end > initrd_start) 169 if (!initrd_start || initrd_end <= initrd_start) {
171 goto sanitize; 170#ifdef CONFIG_PROBE_INITRD_HEADER
171 u32 *initrd_header;
172 172
173 /* 173 /*
174 * See if initrd has been added to the kernel image by 174 * See if initrd has been added to the kernel image by
175 * arch/mips/boot/addinitrd.c. In that case a header is 175 * arch/mips/boot/addinitrd.c. In that case a header is
176 * prepended to initrd and is made up by 8 bytes. The fisrt 176 * prepended to initrd and is made up by 8 bytes. The first
177 * word is a magic number and the second one is the size of 177 * word is a magic number and the second one is the size of
178 * initrd. Initrd start must be page aligned in any cases. 178 * initrd. Initrd start must be page aligned in any cases.
179 */ 179 */
180 initrd_header = __va(PAGE_ALIGN(__pa_symbol(&_end) + 8)) - 8; 180 initrd_header = __va(PAGE_ALIGN(__pa_symbol(&_end) + 8)) - 8;
181 if (initrd_header[0] != 0x494E5244) 181 if (initrd_header[0] != 0x494E5244)
182 goto disable;
183 initrd_start = (unsigned long)(initrd_header + 2);
184 initrd_end = initrd_start + initrd_header[1];
185#else
182 goto disable; 186 goto disable;
183 initrd_start = (unsigned long)(initrd_header + 2); 187#endif
184 initrd_end = initrd_start + initrd_header[1]; 188 }
185 189
186sanitize:
187 if (initrd_start & ~PAGE_MASK) { 190 if (initrd_start & ~PAGE_MASK) {
188 pr_err("initrd start must be page aligned\n"); 191 pr_err("initrd start must be page aligned\n");
189 goto disable; 192 goto disable;
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 426cced1e9dc..6bee29097a56 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -373,8 +373,8 @@ void __noreturn die(const char * str, const struct pt_regs * regs)
373 do_exit(SIGSEGV); 373 do_exit(SIGSEGV);
374} 374}
375 375
376extern const struct exception_table_entry __start___dbe_table[]; 376extern struct exception_table_entry __start___dbe_table[];
377extern const struct exception_table_entry __stop___dbe_table[]; 377extern struct exception_table_entry __stop___dbe_table[];
378 378
379__asm__( 379__asm__(
380" .section __dbe_table, \"a\"\n" 380" .section __dbe_table, \"a\"\n"
@@ -1200,7 +1200,7 @@ void *set_except_vector(int n, void *addr)
1200 if (n == 0 && cpu_has_divec) { 1200 if (n == 0 && cpu_has_divec) {
1201 *(u32 *)(ebase + 0x200) = 0x08000000 | 1201 *(u32 *)(ebase + 0x200) = 0x08000000 |
1202 (0x03ffffff & (handler >> 2)); 1202 (0x03ffffff & (handler >> 2));
1203 flush_icache_range(ebase + 0x200, ebase + 0x204); 1203 local_flush_icache_range(ebase + 0x200, ebase + 0x204);
1204 } 1204 }
1205 return (void *)old_handler; 1205 return (void *)old_handler;
1206} 1206}
@@ -1283,7 +1283,8 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs)
1283 *w = (*w & 0xffff0000) | (((u32)handler >> 16) & 0xffff); 1283 *w = (*w & 0xffff0000) | (((u32)handler >> 16) & 0xffff);
1284 w = (u32 *)(b + ori_offset); 1284 w = (u32 *)(b + ori_offset);
1285 *w = (*w & 0xffff0000) | ((u32)handler & 0xffff); 1285 *w = (*w & 0xffff0000) | ((u32)handler & 0xffff);
1286 flush_icache_range((unsigned long)b, (unsigned long)(b+handler_len)); 1286 local_flush_icache_range((unsigned long)b,
1287 (unsigned long)(b+handler_len));
1287 } 1288 }
1288 else { 1289 else {
1289 /* 1290 /*
@@ -1295,7 +1296,8 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs)
1295 w = (u32 *)b; 1296 w = (u32 *)b;
1296 *w++ = 0x08000000 | (((u32)handler >> 2) & 0x03fffff); /* j handler */ 1297 *w++ = 0x08000000 | (((u32)handler >> 2) & 0x03fffff); /* j handler */
1297 *w = 0; 1298 *w = 0;
1298 flush_icache_range((unsigned long)b, (unsigned long)(b+8)); 1299 local_flush_icache_range((unsigned long)b,
1300 (unsigned long)(b+8));
1299 } 1301 }
1300 1302
1301 return (void *)old_handler; 1303 return (void *)old_handler;
@@ -1515,7 +1517,7 @@ void __cpuinit per_cpu_trap_init(void)
1515void __init set_handler(unsigned long offset, void *addr, unsigned long size) 1517void __init set_handler(unsigned long offset, void *addr, unsigned long size)
1516{ 1518{
1517 memcpy((void *)(ebase + offset), addr, size); 1519 memcpy((void *)(ebase + offset), addr, size);
1518 flush_icache_range(ebase + offset, ebase + offset + size); 1520 local_flush_icache_range(ebase + offset, ebase + offset + size);
1519} 1521}
1520 1522
1521static char panic_null_cerr[] __cpuinitdata = 1523static char panic_null_cerr[] __cpuinitdata =
@@ -1680,6 +1682,8 @@ void __init trap_init(void)
1680 signal32_init(); 1682 signal32_init();
1681#endif 1683#endif
1682 1684
1683 flush_icache_range(ebase, ebase + 0x400); 1685 local_flush_icache_range(ebase, ebase + 0x400);
1684 flush_tlb_handlers(); 1686 flush_tlb_handlers();
1687
1688 sort_extable(__start___dbe_table, __stop___dbe_table);
1685} 1689}