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authorIngo Molnar <mingo@elte.hu>2009-03-30 17:53:32 -0400
committerIngo Molnar <mingo@elte.hu>2009-03-30 17:53:32 -0400
commit65fb0d23fcddd8697c871047b700c78817bdaa43 (patch)
tree119e6e5f276622c4c862f6c9b6d795264ba1603a /arch/mips/kernel
parent8c083f081d0014057901c68a0a3e0f8ca7ac8d23 (diff)
parentdfbbe89e197a77f2c8046a51c74e33e35f878080 (diff)
Merge branch 'linus' into cpumask-for-linus
Conflicts: arch/x86/kernel/cpu/common.c
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r--arch/mips/kernel/cpu-probe.c21
-rw-r--r--arch/mips/kernel/irq-msc01.c6
-rw-r--r--arch/mips/kernel/irq.c2
-rw-r--r--arch/mips/kernel/irq_cpu.c3
-rw-r--r--arch/mips/kernel/linux32.c41
-rw-r--r--arch/mips/kernel/scall64-n32.S2
-rw-r--r--arch/mips/kernel/scall64-o32.S2
-rw-r--r--arch/mips/kernel/setup.c3
-rw-r--r--arch/mips/kernel/smp-up.c14
-rw-r--r--arch/mips/kernel/smp.c2
-rw-r--r--arch/mips/kernel/traps.c15
11 files changed, 34 insertions, 77 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 1bdbcad3bb74..b13b8eb30596 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -183,13 +183,7 @@ void __init check_wait(void)
183 case CPU_TX49XX: 183 case CPU_TX49XX:
184 cpu_wait = r4k_wait_irqoff; 184 cpu_wait = r4k_wait_irqoff;
185 break; 185 break;
186 case CPU_AU1000: 186 case CPU_ALCHEMY:
187 case CPU_AU1100:
188 case CPU_AU1500:
189 case CPU_AU1550:
190 case CPU_AU1200:
191 case CPU_AU1210:
192 case CPU_AU1250:
193 cpu_wait = au1k_wait; 187 cpu_wait = au1k_wait;
194 break; 188 break;
195 case CPU_20KC: 189 case CPU_20KC:
@@ -783,37 +777,30 @@ static inline void cpu_probe_alchemy(struct cpuinfo_mips *c, unsigned int cpu)
783 switch (c->processor_id & 0xff00) { 777 switch (c->processor_id & 0xff00) {
784 case PRID_IMP_AU1_REV1: 778 case PRID_IMP_AU1_REV1:
785 case PRID_IMP_AU1_REV2: 779 case PRID_IMP_AU1_REV2:
780 c->cputype = CPU_ALCHEMY;
786 switch ((c->processor_id >> 24) & 0xff) { 781 switch ((c->processor_id >> 24) & 0xff) {
787 case 0: 782 case 0:
788 c->cputype = CPU_AU1000;
789 __cpu_name[cpu] = "Au1000"; 783 __cpu_name[cpu] = "Au1000";
790 break; 784 break;
791 case 1: 785 case 1:
792 c->cputype = CPU_AU1500;
793 __cpu_name[cpu] = "Au1500"; 786 __cpu_name[cpu] = "Au1500";
794 break; 787 break;
795 case 2: 788 case 2:
796 c->cputype = CPU_AU1100;
797 __cpu_name[cpu] = "Au1100"; 789 __cpu_name[cpu] = "Au1100";
798 break; 790 break;
799 case 3: 791 case 3:
800 c->cputype = CPU_AU1550;
801 __cpu_name[cpu] = "Au1550"; 792 __cpu_name[cpu] = "Au1550";
802 break; 793 break;
803 case 4: 794 case 4:
804 c->cputype = CPU_AU1200;
805 __cpu_name[cpu] = "Au1200"; 795 __cpu_name[cpu] = "Au1200";
806 if ((c->processor_id & 0xff) == 2) { 796 if ((c->processor_id & 0xff) == 2)
807 c->cputype = CPU_AU1250;
808 __cpu_name[cpu] = "Au1250"; 797 __cpu_name[cpu] = "Au1250";
809 }
810 break; 798 break;
811 case 5: 799 case 5:
812 c->cputype = CPU_AU1210;
813 __cpu_name[cpu] = "Au1210"; 800 __cpu_name[cpu] = "Au1210";
814 break; 801 break;
815 default: 802 default:
816 panic("Unknown Au Core!"); 803 __cpu_name[cpu] = "Au1xxx";
817 break; 804 break;
818 } 805 }
819 break; 806 break;
diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c
index 963c16d266ab..6a8cd28133d5 100644
--- a/arch/mips/kernel/irq-msc01.c
+++ b/arch/mips/kernel/irq-msc01.c
@@ -140,14 +140,16 @@ void __init init_msc_irqs(unsigned long icubase, unsigned int irqbase, msc_irqma
140 140
141 switch (imp->im_type) { 141 switch (imp->im_type) {
142 case MSC01_IRQ_EDGE: 142 case MSC01_IRQ_EDGE:
143 set_irq_chip(irqbase+n, &msc_edgeirq_type); 143 set_irq_chip_and_handler_name(irqbase + n,
144 &msc_edgeirq_type, handle_edge_irq, "edge");
144 if (cpu_has_veic) 145 if (cpu_has_veic)
145 MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT); 146 MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT);
146 else 147 else
147 MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl); 148 MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl);
148 break; 149 break;
149 case MSC01_IRQ_LEVEL: 150 case MSC01_IRQ_LEVEL:
150 set_irq_chip(irqbase+n, &msc_levelirq_type); 151 set_irq_chip_and_handler_name(irqbase+n,
152 &msc_levelirq_type, handle_level_irq, "level");
151 if (cpu_has_veic) 153 if (cpu_has_veic)
152 MSCIC_WRITE(MSC01_IC_SUP+n*8, 0); 154 MSCIC_WRITE(MSC01_IC_SUP+n*8, 0);
153 else 155 else
diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c
index 4b4007b3083a..7b845ba9dff4 100644
--- a/arch/mips/kernel/irq.c
+++ b/arch/mips/kernel/irq.c
@@ -108,7 +108,7 @@ int show_interrupts(struct seq_file *p, void *v)
108 seq_printf(p, "%10u ", kstat_irqs(i)); 108 seq_printf(p, "%10u ", kstat_irqs(i));
109#else 109#else
110 for_each_online_cpu(j) 110 for_each_online_cpu(j)
111 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); 111 seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
112#endif 112#endif
113 seq_printf(p, " %14s", irq_desc[i].chip->name); 113 seq_printf(p, " %14s", irq_desc[i].chip->name);
114 seq_printf(p, " %s", action->name); 114 seq_printf(p, " %s", action->name);
diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c
index 0ee2567b780d..55c8a3ca507b 100644
--- a/arch/mips/kernel/irq_cpu.c
+++ b/arch/mips/kernel/irq_cpu.c
@@ -112,7 +112,8 @@ void __init mips_cpu_irq_init(void)
112 */ 112 */
113 if (cpu_has_mipsmt) 113 if (cpu_has_mipsmt)
114 for (i = irq_base; i < irq_base + 2; i++) 114 for (i = irq_base; i < irq_base + 2; i++)
115 set_irq_chip(i, &mips_mt_cpu_irq_controller); 115 set_irq_chip_and_handler(i, &mips_mt_cpu_irq_controller,
116 handle_percpu_irq);
116 117
117 for (i = irq_base + 2; i < irq_base + 8; i++) 118 for (i = irq_base + 2; i < irq_base + 8; i++)
118 set_irq_chip_and_handler(i, &mips_cpu_irq_controller, 119 set_irq_chip_and_handler(i, &mips_cpu_irq_controller,
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c
index 1a86f84fa947..6242bc68add7 100644
--- a/arch/mips/kernel/linux32.c
+++ b/arch/mips/kernel/linux32.c
@@ -32,7 +32,6 @@
32#include <linux/module.h> 32#include <linux/module.h>
33#include <linux/binfmts.h> 33#include <linux/binfmts.h>
34#include <linux/security.h> 34#include <linux/security.h>
35#include <linux/syscalls.h>
36#include <linux/compat.h> 35#include <linux/compat.h>
37#include <linux/vfs.h> 36#include <linux/vfs.h>
38#include <linux/ipc.h> 37#include <linux/ipc.h>
@@ -134,9 +133,9 @@ SYSCALL_DEFINE4(32_ftruncate64, unsigned long, fd, unsigned long, __dummy,
134 return sys_ftruncate(fd, merge_64(a2, a3)); 133 return sys_ftruncate(fd, merge_64(a2, a3));
135} 134}
136 135
137SYSCALL_DEFINE5(32_llseek, unsigned long, fd, unsigned long, offset_high, 136SYSCALL_DEFINE5(32_llseek, unsigned int, fd, unsigned int, offset_high,
138 unsigned long, offset_low, loff_t __user *, result, 137 unsigned int, offset_low, loff_t __user *, result,
139 unsigned long, origin) 138 unsigned int, origin)
140{ 139{
141 return sys_llseek(fd, offset_high, offset_low, result, origin); 140 return sys_llseek(fd, offset_high, offset_low, result, origin);
142} 141}
@@ -356,40 +355,6 @@ SYSCALL_DEFINE1(32_personality, unsigned long, personality)
356 return ret; 355 return ret;
357} 356}
358 357
359/* ustat compatibility */
360struct ustat32 {
361 compat_daddr_t f_tfree;
362 compat_ino_t f_tinode;
363 char f_fname[6];
364 char f_fpack[6];
365};
366
367extern asmlinkage long sys_ustat(dev_t dev, struct ustat __user * ubuf);
368
369SYSCALL_DEFINE2(32_ustat, dev_t, dev, struct ustat32 __user *, ubuf32)
370{
371 int err;
372 struct ustat tmp;
373 struct ustat32 tmp32;
374 mm_segment_t old_fs = get_fs();
375
376 set_fs(KERNEL_DS);
377 err = sys_ustat(dev, (struct ustat __user *)&tmp);
378 set_fs(old_fs);
379
380 if (err)
381 goto out;
382
383 memset(&tmp32, 0, sizeof(struct ustat32));
384 tmp32.f_tfree = tmp.f_tfree;
385 tmp32.f_tinode = tmp.f_tinode;
386
387 err = copy_to_user(ubuf32, &tmp32, sizeof(struct ustat32)) ? -EFAULT : 0;
388
389out:
390 return err;
391}
392
393SYSCALL_DEFINE4(32_sendfile, long, out_fd, long, in_fd, 358SYSCALL_DEFINE4(32_sendfile, long, out_fd, long, in_fd,
394 compat_off_t __user *, offset, s32, count) 359 compat_off_t __user *, offset, s32, count)
395{ 360{
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index 7438e92f8a01..f61d6b0e5731 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -253,7 +253,7 @@ EXPORT(sysn32_call_table)
253 PTR compat_sys_utime /* 6130 */ 253 PTR compat_sys_utime /* 6130 */
254 PTR sys_mknod 254 PTR sys_mknod
255 PTR sys_32_personality 255 PTR sys_32_personality
256 PTR sys_32_ustat 256 PTR compat_sys_ustat
257 PTR compat_sys_statfs 257 PTR compat_sys_statfs
258 PTR compat_sys_fstatfs /* 6135 */ 258 PTR compat_sys_fstatfs /* 6135 */
259 PTR sys_sysfs 259 PTR sys_sysfs
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index b0fef4ff9827..60997f1f69d4 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -265,7 +265,7 @@ sys_call_table:
265 PTR sys_olduname 265 PTR sys_olduname
266 PTR sys_umask /* 4060 */ 266 PTR sys_umask /* 4060 */
267 PTR sys_chroot 267 PTR sys_chroot
268 PTR sys_32_ustat 268 PTR compat_sys_ustat
269 PTR sys_dup2 269 PTR sys_dup2
270 PTR sys_getppid 270 PTR sys_getppid
271 PTR sys_getpgrp /* 4065 */ 271 PTR sys_getpgrp /* 4065 */
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index 4430a1f8fdf1..2950b97253b7 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -277,7 +277,8 @@ static void __init bootmem_init(void)
277 * not selected. Once that done we can determine the low bound 277 * not selected. Once that done we can determine the low bound
278 * of usable memory. 278 * of usable memory.
279 */ 279 */
280 reserved_end = max(init_initrd(), PFN_UP(__pa_symbol(&_end))); 280 reserved_end = max(init_initrd(),
281 (unsigned long) PFN_UP(__pa_symbol(&_end)));
281 282
282 /* 283 /*
283 * max_low_pfn is not a number of pages. The number of pages 284 * max_low_pfn is not a number of pages. The number of pages
diff --git a/arch/mips/kernel/smp-up.c b/arch/mips/kernel/smp-up.c
index ead6c30eeb14..878e3733bbb2 100644
--- a/arch/mips/kernel/smp-up.c
+++ b/arch/mips/kernel/smp-up.c
@@ -13,7 +13,7 @@
13/* 13/*
14 * Send inter-processor interrupt 14 * Send inter-processor interrupt
15 */ 15 */
16void up_send_ipi_single(int cpu, unsigned int action) 16static void up_send_ipi_single(int cpu, unsigned int action)
17{ 17{
18 panic(KERN_ERR "%s called", __func__); 18 panic(KERN_ERR "%s called", __func__);
19} 19}
@@ -27,31 +27,31 @@ static inline void up_send_ipi_mask(cpumask_t mask, unsigned int action)
27 * After we've done initial boot, this function is called to allow the 27 * After we've done initial boot, this function is called to allow the
28 * board code to clean up state, if needed 28 * board code to clean up state, if needed
29 */ 29 */
30void __cpuinit up_init_secondary(void) 30static void __cpuinit up_init_secondary(void)
31{ 31{
32} 32}
33 33
34void __cpuinit up_smp_finish(void) 34static void __cpuinit up_smp_finish(void)
35{ 35{
36} 36}
37 37
38/* Hook for after all CPUs are online */ 38/* Hook for after all CPUs are online */
39void up_cpus_done(void) 39static void up_cpus_done(void)
40{ 40{
41} 41}
42 42
43/* 43/*
44 * Firmware CPU startup hook 44 * Firmware CPU startup hook
45 */ 45 */
46void __cpuinit up_boot_secondary(int cpu, struct task_struct *idle) 46static void __cpuinit up_boot_secondary(int cpu, struct task_struct *idle)
47{ 47{
48} 48}
49 49
50void __init up_smp_setup(void) 50static void __init up_smp_setup(void)
51{ 51{
52} 52}
53 53
54void __init up_prepare_cpus(unsigned int max_cpus) 54static void __init up_prepare_cpus(unsigned int max_cpus)
55{ 55{
56} 56}
57 57
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index 3da94704f816..c937506a03aa 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -44,7 +44,7 @@
44#include <asm/mipsmtregs.h> 44#include <asm/mipsmtregs.h>
45#endif /* CONFIG_MIPS_MT_SMTC */ 45#endif /* CONFIG_MIPS_MT_SMTC */
46 46
47volatile cpumask_t cpu_callin_map; /* Bitmask of started secondaries */ 47static volatile cpumask_t cpu_callin_map; /* Bitmask of started secondaries */
48int __cpu_number_map[NR_CPUS]; /* Map physical to logical */ 48int __cpu_number_map[NR_CPUS]; /* Map physical to logical */
49int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */ 49int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */
50 50
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index b2d7041341b8..e83da174b533 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1277,8 +1277,7 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs)
1277 u32 *w; 1277 u32 *w;
1278 unsigned char *b; 1278 unsigned char *b;
1279 1279
1280 if (!cpu_has_veic && !cpu_has_vint) 1280 BUG_ON(!cpu_has_veic && !cpu_has_vint);
1281 BUG();
1282 1281
1283 if (addr == NULL) { 1282 if (addr == NULL) {
1284 handler = (unsigned long) do_default_vi; 1283 handler = (unsigned long) do_default_vi;
@@ -1520,7 +1519,9 @@ void __cpuinit per_cpu_trap_init(void)
1520#endif /* CONFIG_MIPS_MT_SMTC */ 1519#endif /* CONFIG_MIPS_MT_SMTC */
1521 1520
1522 if (cpu_has_veic || cpu_has_vint) { 1521 if (cpu_has_veic || cpu_has_vint) {
1522 unsigned long sr = set_c0_status(ST0_BEV);
1523 write_c0_ebase(ebase); 1523 write_c0_ebase(ebase);
1524 write_c0_status(sr);
1524 /* Setting vector spacing enables EI/VI mode */ 1525 /* Setting vector spacing enables EI/VI mode */
1525 change_c0_intctl(0x3e0, VECTORSPACING); 1526 change_c0_intctl(0x3e0, VECTORSPACING);
1526 } 1527 }
@@ -1602,8 +1603,6 @@ void __cpuinit set_uncached_handler(unsigned long offset, void *addr,
1602#ifdef CONFIG_64BIT 1603#ifdef CONFIG_64BIT
1603 unsigned long uncached_ebase = TO_UNCAC(ebase); 1604 unsigned long uncached_ebase = TO_UNCAC(ebase);
1604#endif 1605#endif
1605 if (cpu_has_mips_r2)
1606 uncached_ebase += (read_c0_ebase() & 0x3ffff000);
1607 1606
1608 if (!addr) 1607 if (!addr)
1609 panic(panic_null_cerr); 1608 panic(panic_null_cerr);
@@ -1635,9 +1634,11 @@ void __init trap_init(void)
1635 return; /* Already done */ 1634 return; /* Already done */
1636#endif 1635#endif
1637 1636
1638 if (cpu_has_veic || cpu_has_vint) 1637 if (cpu_has_veic || cpu_has_vint) {
1639 ebase = (unsigned long) alloc_bootmem_low_pages(0x200 + VECTORSPACING*64); 1638 unsigned long size = 0x200 + VECTORSPACING*64;
1640 else { 1639 ebase = (unsigned long)
1640 __alloc_bootmem(size, 1 << fls(size), 0);
1641 } else {
1641 ebase = CAC_BASE; 1642 ebase = CAC_BASE;
1642 if (cpu_has_mips_r2) 1643 if (cpu_has_mips_r2)
1643 ebase += (read_c0_ebase() & 0x3ffff000); 1644 ebase += (read_c0_ebase() & 0x3ffff000);