diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2007-02-20 19:10:19 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2007-02-21 19:50:45 -0500 |
commit | de7fa296b60c9086fa038350404975b7ee4e60c2 (patch) | |
tree | 8e8aed9a18cafd1f07853076fab2fead0f29e958 /arch/mips/kernel | |
parent | 9693a85378b590cc7a4aa2db2174422585c7c8c4 (diff) |
[MIPS] SMP: Get smp_tune_scheduling to do something useful.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r-- | arch/mips/kernel/smp.c | 25 |
1 files changed, 4 insertions, 21 deletions
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c index 0555fc554f65..c46e479c992b 100644 --- a/arch/mips/kernel/smp.c +++ b/arch/mips/kernel/smp.c | |||
@@ -51,31 +51,14 @@ int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */ | |||
51 | EXPORT_SYMBOL(phys_cpu_present_map); | 51 | EXPORT_SYMBOL(phys_cpu_present_map); |
52 | EXPORT_SYMBOL(cpu_online_map); | 52 | EXPORT_SYMBOL(cpu_online_map); |
53 | 53 | ||
54 | /* This happens early in bootup, can't really do it better */ | ||
54 | static void smp_tune_scheduling (void) | 55 | static void smp_tune_scheduling (void) |
55 | { | 56 | { |
56 | struct cache_desc *cd = ¤t_cpu_data.scache; | 57 | struct cache_desc *cd = ¤t_cpu_data.scache; |
57 | unsigned long cachesize; /* kB */ | 58 | unsigned long cachesize = cd->linesz * cd->sets * cd->ways; |
58 | unsigned long cpu_khz; | ||
59 | 59 | ||
60 | /* | 60 | if (cachesize > max_cache_size) |
61 | * Crude estimate until we actually meassure ... | 61 | max_cache_size = cachesize; |
62 | */ | ||
63 | cpu_khz = loops_per_jiffy * 2 * HZ / 1000; | ||
64 | |||
65 | /* | ||
66 | * Rough estimation for SMP scheduling, this is the number of | ||
67 | * cycles it takes for a fully memory-limited process to flush | ||
68 | * the SMP-local cache. | ||
69 | * | ||
70 | * (For a P5 this pretty much means we will choose another idle | ||
71 | * CPU almost always at wakeup time (this is due to the small | ||
72 | * L1 cache), on PIIs it's around 50-100 usecs, depending on | ||
73 | * the cache size) | ||
74 | */ | ||
75 | if (!cpu_khz) | ||
76 | return; | ||
77 | |||
78 | cachesize = cd->linesz * cd->sets * cd->ways; | ||
79 | } | 62 | } |
80 | 63 | ||
81 | extern void __init calibrate_delay(void); | 64 | extern void __init calibrate_delay(void); |