diff options
author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2006-11-13 11:13:18 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2006-11-29 20:14:46 -0500 |
commit | 1417836e81c0ab8f5a0bfeafa90d3eaa41b2a067 (patch) | |
tree | 0274893cb78ca2e1bb85c3eee0c07a85e0b83d04 /arch/mips/kernel | |
parent | 1603b5aca4f15b34848fb5594d0c7b6333b99144 (diff) |
[MIPS] use generic_handle_irq, handle_level_irq, handle_percpu_irq
Further incorporation of generic irq framework. Replacing __do_IRQ()
by proper flow handler would make the irq handling path a bit simpler
and faster.
* use generic_handle_irq() instead of __do_IRQ().
* use handle_level_irq for obvious level-type irq chips.
* use handle_percpu_irq for irqs marked as IRQ_PER_CPU.
* setup .eoi routine for irq chips possibly used with handle_percpu_irq.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r-- | arch/mips/kernel/irq-msc01.c | 2 | ||||
-rw-r--r-- | arch/mips/kernel/irq-mv6434x.c | 3 | ||||
-rw-r--r-- | arch/mips/kernel/irq-rm7000.c | 3 | ||||
-rw-r--r-- | arch/mips/kernel/irq-rm9000.c | 6 | ||||
-rw-r--r-- | arch/mips/kernel/irq_cpu.c | 5 | ||||
-rw-r--r-- | arch/mips/kernel/smp-mt.c | 2 | ||||
-rw-r--r-- | arch/mips/kernel/smtc.c | 1 |
7 files changed, 17 insertions, 5 deletions
diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c index e1880b27381b..bcaad6696082 100644 --- a/arch/mips/kernel/irq-msc01.c +++ b/arch/mips/kernel/irq-msc01.c | |||
@@ -117,6 +117,7 @@ struct irq_chip msc_levelirq_type = { | |||
117 | .mask = mask_msc_irq, | 117 | .mask = mask_msc_irq, |
118 | .mask_ack = level_mask_and_ack_msc_irq, | 118 | .mask_ack = level_mask_and_ack_msc_irq, |
119 | .unmask = unmask_msc_irq, | 119 | .unmask = unmask_msc_irq, |
120 | .eoi = unmask_msc_irq, | ||
120 | .end = end_msc_irq, | 121 | .end = end_msc_irq, |
121 | }; | 122 | }; |
122 | 123 | ||
@@ -126,6 +127,7 @@ struct irq_chip msc_edgeirq_type = { | |||
126 | .mask = mask_msc_irq, | 127 | .mask = mask_msc_irq, |
127 | .mask_ack = edge_mask_and_ack_msc_irq, | 128 | .mask_ack = edge_mask_and_ack_msc_irq, |
128 | .unmask = unmask_msc_irq, | 129 | .unmask = unmask_msc_irq, |
130 | .eoi = unmask_msc_irq, | ||
129 | .end = end_msc_irq, | 131 | .end = end_msc_irq, |
130 | }; | 132 | }; |
131 | 133 | ||
diff --git a/arch/mips/kernel/irq-mv6434x.c b/arch/mips/kernel/irq-mv6434x.c index 5012b9df1b5a..6cfb31cafde2 100644 --- a/arch/mips/kernel/irq-mv6434x.c +++ b/arch/mips/kernel/irq-mv6434x.c | |||
@@ -114,7 +114,8 @@ void __init mv64340_irq_init(unsigned int base) | |||
114 | int i; | 114 | int i; |
115 | 115 | ||
116 | for (i = base; i < base + 64; i++) | 116 | for (i = base; i < base + 64; i++) |
117 | set_irq_chip(i, &mv64340_irq_type); | 117 | set_irq_chip_and_handler(i, &mv64340_irq_type, |
118 | handle_level_irq); | ||
118 | 119 | ||
119 | irq_base = base; | 120 | irq_base = base; |
120 | } | 121 | } |
diff --git a/arch/mips/kernel/irq-rm7000.c b/arch/mips/kernel/irq-rm7000.c index 6a297e3b8899..ddcc2a5f8a06 100644 --- a/arch/mips/kernel/irq-rm7000.c +++ b/arch/mips/kernel/irq-rm7000.c | |||
@@ -51,7 +51,8 @@ void __init rm7k_cpu_irq_init(int base) | |||
51 | clear_c0_intcontrol(0x00000f00); /* Mask all */ | 51 | clear_c0_intcontrol(0x00000f00); /* Mask all */ |
52 | 52 | ||
53 | for (i = base; i < base + 4; i++) | 53 | for (i = base; i < base + 4; i++) |
54 | set_irq_chip(i, &rm7k_irq_controller); | 54 | set_irq_chip_and_handler(i, &rm7k_irq_controller, |
55 | handle_level_irq); | ||
55 | 56 | ||
56 | irq_base = base; | 57 | irq_base = base; |
57 | } | 58 | } |
diff --git a/arch/mips/kernel/irq-rm9000.c b/arch/mips/kernel/irq-rm9000.c index 977538445cf3..ba6440c88abd 100644 --- a/arch/mips/kernel/irq-rm9000.c +++ b/arch/mips/kernel/irq-rm9000.c | |||
@@ -117,10 +117,12 @@ void __init rm9k_cpu_irq_init(int base) | |||
117 | clear_c0_intcontrol(0x0000f000); /* Mask all */ | 117 | clear_c0_intcontrol(0x0000f000); /* Mask all */ |
118 | 118 | ||
119 | for (i = base; i < base + 4; i++) | 119 | for (i = base; i < base + 4; i++) |
120 | set_irq_chip(i, &rm9k_irq_controller); | 120 | set_irq_chip_and_handler(i, &rm9k_irq_controller, |
121 | handle_level_irq); | ||
121 | 122 | ||
122 | rm9000_perfcount_irq = base + 1; | 123 | rm9000_perfcount_irq = base + 1; |
123 | set_irq_chip(rm9000_perfcount_irq, &rm9k_perfcounter_irq); | 124 | set_irq_chip_and_handler(rm9000_perfcount_irq, &rm9k_perfcounter_irq, |
125 | handle_level_irq); | ||
124 | 126 | ||
125 | irq_base = base; | 127 | irq_base = base; |
126 | } | 128 | } |
diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c index 3b7cfa407e87..be5ac23d3812 100644 --- a/arch/mips/kernel/irq_cpu.c +++ b/arch/mips/kernel/irq_cpu.c | |||
@@ -62,6 +62,7 @@ static struct irq_chip mips_cpu_irq_controller = { | |||
62 | .mask = mask_mips_irq, | 62 | .mask = mask_mips_irq, |
63 | .mask_ack = mask_mips_irq, | 63 | .mask_ack = mask_mips_irq, |
64 | .unmask = unmask_mips_irq, | 64 | .unmask = unmask_mips_irq, |
65 | .eoi = unmask_mips_irq, | ||
65 | .end = mips_cpu_irq_end, | 66 | .end = mips_cpu_irq_end, |
66 | }; | 67 | }; |
67 | 68 | ||
@@ -104,6 +105,7 @@ static struct irq_chip mips_mt_cpu_irq_controller = { | |||
104 | .mask = mask_mips_mt_irq, | 105 | .mask = mask_mips_mt_irq, |
105 | .mask_ack = mips_mt_cpu_irq_ack, | 106 | .mask_ack = mips_mt_cpu_irq_ack, |
106 | .unmask = unmask_mips_mt_irq, | 107 | .unmask = unmask_mips_mt_irq, |
108 | .eoi = unmask_mips_mt_irq, | ||
107 | .end = mips_mt_cpu_irq_end, | 109 | .end = mips_mt_cpu_irq_end, |
108 | }; | 110 | }; |
109 | 111 | ||
@@ -124,7 +126,8 @@ void __init mips_cpu_irq_init(int irq_base) | |||
124 | set_irq_chip(i, &mips_mt_cpu_irq_controller); | 126 | set_irq_chip(i, &mips_mt_cpu_irq_controller); |
125 | 127 | ||
126 | for (i = irq_base + 2; i < irq_base + 8; i++) | 128 | for (i = irq_base + 2; i < irq_base + 8; i++) |
127 | set_irq_chip(i, &mips_cpu_irq_controller); | 129 | set_irq_chip_and_handler(i, &mips_cpu_irq_controller, |
130 | handle_level_irq); | ||
128 | 131 | ||
129 | mips_cpu_irq_base = irq_base; | 132 | mips_cpu_irq_base = irq_base; |
130 | } | 133 | } |
diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c index 2ac19a6cbf68..1ee689c0e0c9 100644 --- a/arch/mips/kernel/smp-mt.c +++ b/arch/mips/kernel/smp-mt.c | |||
@@ -278,7 +278,9 @@ void __init plat_prepare_cpus(unsigned int max_cpus) | |||
278 | 278 | ||
279 | /* need to mark IPI's as IRQ_PER_CPU */ | 279 | /* need to mark IPI's as IRQ_PER_CPU */ |
280 | irq_desc[cpu_ipi_resched_irq].status |= IRQ_PER_CPU; | 280 | irq_desc[cpu_ipi_resched_irq].status |= IRQ_PER_CPU; |
281 | set_irq_handler(cpu_ipi_resched_irq, handle_percpu_irq); | ||
281 | irq_desc[cpu_ipi_call_irq].status |= IRQ_PER_CPU; | 282 | irq_desc[cpu_ipi_call_irq].status |= IRQ_PER_CPU; |
283 | set_irq_handler(cpu_ipi_call_irq, handle_percpu_irq); | ||
282 | } | 284 | } |
283 | 285 | ||
284 | /* | 286 | /* |
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c index 3b78caf112f5..802febed7df5 100644 --- a/arch/mips/kernel/smtc.c +++ b/arch/mips/kernel/smtc.c | |||
@@ -1009,6 +1009,7 @@ void setup_cross_vpe_interrupts(void) | |||
1009 | setup_irq_smtc(cpu_ipi_irq, &irq_ipi, (0x100 << MIPS_CPU_IPI_IRQ)); | 1009 | setup_irq_smtc(cpu_ipi_irq, &irq_ipi, (0x100 << MIPS_CPU_IPI_IRQ)); |
1010 | 1010 | ||
1011 | irq_desc[cpu_ipi_irq].status |= IRQ_PER_CPU; | 1011 | irq_desc[cpu_ipi_irq].status |= IRQ_PER_CPU; |
1012 | set_irq_handler(cpu_ipi_irq, handle_percpu_irq); | ||
1012 | } | 1013 | } |
1013 | 1014 | ||
1014 | /* | 1015 | /* |