[MIPS] PMC MSP71xx mips common

Patch to add mips common support for the PMC-Sierra MSP71xx devices.

Signed-off-by: Marc St-Jean <Marc_St-Jean@pmc-sierra.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

3 files changed, 30 insertions, 1 deletions

diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 23d8a3b7dd75..c6b8b074a81a 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -186,9 +186,29 @@ static inline void check_wait(void)
         }
 }
 
+static inline void check_errata(void)
+{
+        struct cpuinfo_mips *c = &current_cpu_data;
+
+        switch (c->cputype) {
+        case CPU_34K:
+                /*
+                 * Erratum "RPS May Cause Incorrect Instruction Execution"
+                 * This code only handles VPE0, any SMP/SMTC/RTOS code
+                 * making use of VPE1 will be responsable for that VPE.
+                 */
+                if ((c->processor_id & PRID_REV_MASK) <= PRID_REV_34K_V1_0_2)
+                        write_c0_config7(read_c0_config7() | MIPS_CONF7_RPS);
+                break;
+        default:
+                break;
+        }
+}
+
 void __init check_bugs32(void)
 {
         check_wait();
+        check_errata();
 }
 
 /*
diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S
index 1f096aa35bc0..f78538eceef7 100644
--- a/arch/mips/kernel/head.S
+++ b/arch/mips/kernel/head.S
@@ -16,6 +16,7 @@
 #include <linux/init.h>
 #include <linux/threads.h>
 
+#include <asm/addrspace.h>
 #include <asm/asm.h>
 #include <asm/asmmacro.h>
 #include <asm/irqflags.h>
@@ -129,16 +130,18 @@
 #endif
         .endm
 
+#ifndef CONFIG_NO_EXCEPT_FILL
         /*
          * Reserved space for exception handlers.
          * Necessary for machines which link their kernels at KSEG0.
          */
         .fill   0x400
+#endif
 
 EXPORT(stext)                                   # used for profiling
 EXPORT(_stext)
 
-#ifndef CONFIG_MIPS_SIM
+#ifdef CONFIG_BOOT_RAW
         /*
          * Give us a fighting chance of running if execution beings at the
          * kernel load address.  This is needed because this platform does
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 9b19a84d11ef..80ea4fa95bd9 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -69,6 +69,7 @@ extern asmlinkage void handle_reserved(void);
 extern int fpu_emulator_cop1Handler(struct pt_regs *xcp,
         struct mips_fpu_struct *ctx, int has_fpu);
 
+void (*board_watchpoint_handler)(struct pt_regs *regs);
 void (*board_be_init)(void);
 int (*board_be_handler)(struct pt_regs *regs, int is_fixup);
 void (*board_nmi_handler_setup)(void);
@@ -833,6 +834,11 @@ asmlinkage void do_mdmx(struct pt_regs *regs)
 
 asmlinkage void do_watch(struct pt_regs *regs)
 {
+        if (board_watchpoint_handler) {
+                (*board_watchpoint_handler)(regs);
+                return;
+        }
+
         /*
          * We use the watch exception where available to detect stack
          * overflows.