diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2007-11-15 14:37:15 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2007-11-15 18:21:52 -0500 |
commit | 30e748a507919a41f9eb4d10b4954f453325a37d (patch) | |
tree | a499fb079d632e401d8313caa229e899f6a251b3 /arch/mips/kernel | |
parent | f99f2cc9363a08cdbd6cfbe3f29234e3235d05e8 (diff) |
[MIPS] irq_cpu: use handle_percpu_irq handler to avoid dropping interrupts.
This matters to any sort of device that is wired to one of the CPU
interrupt pins on an SMP system. Typically the scenario is most easily
triggered with the count/compare timer interrupt where the same interrupt
number and thus irq_desc is used on each processor.
CPU A CPU B
do_IRQ()
generic_handle_irq()
handle_level_irq()
spin_lock(desc_lock)
set IRQ_INPROGRESS
spin_unlock(desc_lock)
do_IRQ()
generic_handle_irq()
handle_level_irq()
spin_lock(desc_lock)
IRQ_INPROGRESS set => bail out
spin_lock(desc_lock)
clear IRQ_INPROGRESS
spin_unlock(desc_lock)
In case of the cp0 compare interrupt this means the interrupt will be
acked and not handled or re-armed on CPU b, so there won't be any timer
interrupt until the count register wraps around.
With kernels 2.6.20 ... 2.6.23 we usually were lucky that things were just
working right on VSMP because the count registers are synchronized on
bootup so it takes something that disables interrupts for a long time on
one processor to trigger this one.
For scenarios where an interrupt is multicasted or broadcasted over several
CPUs the existing code was safe and the fix will break it. There is no
way to know in the interrupt controller code because it is abstracted from
the platform code. I think we do not have such a setup currently, so this
should be ok.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r-- | arch/mips/kernel/irq-rm7000.c | 2 | ||||
-rw-r--r-- | arch/mips/kernel/irq-rm9000.c | 2 | ||||
-rw-r--r-- | arch/mips/kernel/irq_cpu.c | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/arch/mips/kernel/irq-rm7000.c b/arch/mips/kernel/irq-rm7000.c index 250732883488..971adf6ef4f4 100644 --- a/arch/mips/kernel/irq-rm7000.c +++ b/arch/mips/kernel/irq-rm7000.c | |||
@@ -44,5 +44,5 @@ void __init rm7k_cpu_irq_init(void) | |||
44 | 44 | ||
45 | for (i = base; i < base + 4; i++) | 45 | for (i = base; i < base + 4; i++) |
46 | set_irq_chip_and_handler(i, &rm7k_irq_controller, | 46 | set_irq_chip_and_handler(i, &rm7k_irq_controller, |
47 | handle_level_irq); | 47 | handle_percpu_irq); |
48 | } | 48 | } |
diff --git a/arch/mips/kernel/irq-rm9000.c b/arch/mips/kernel/irq-rm9000.c index ae83d2df6f31..7b04583bd800 100644 --- a/arch/mips/kernel/irq-rm9000.c +++ b/arch/mips/kernel/irq-rm9000.c | |||
@@ -104,5 +104,5 @@ void __init rm9k_cpu_irq_init(void) | |||
104 | 104 | ||
105 | rm9000_perfcount_irq = base + 1; | 105 | rm9000_perfcount_irq = base + 1; |
106 | set_irq_chip_and_handler(rm9000_perfcount_irq, &rm9k_perfcounter_irq, | 106 | set_irq_chip_and_handler(rm9000_perfcount_irq, &rm9k_perfcounter_irq, |
107 | handle_level_irq); | 107 | handle_percpu_irq); |
108 | } | 108 | } |
diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c index 7b66e03b5899..0ee2567b780d 100644 --- a/arch/mips/kernel/irq_cpu.c +++ b/arch/mips/kernel/irq_cpu.c | |||
@@ -116,5 +116,5 @@ void __init mips_cpu_irq_init(void) | |||
116 | 116 | ||
117 | for (i = irq_base + 2; i < irq_base + 8; i++) | 117 | for (i = irq_base + 2; i < irq_base + 8; i++) |
118 | set_irq_chip_and_handler(i, &mips_cpu_irq_controller, | 118 | set_irq_chip_and_handler(i, &mips_cpu_irq_controller, |
119 | handle_level_irq); | 119 | handle_percpu_irq); |
120 | } | 120 | } |