Merge branch 'sh/g3-prep' into sh/for-2.6.33

1 files changed, 18 insertions, 7 deletions

diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c
index 67bd626942ab..69b039ca8d83 100644
--- a/arch/mips/kernel/unaligned.c
+++ b/arch/mips/kernel/unaligned.c
@@ -81,6 +81,7 @@
 #include <asm/asm.h>
 #include <asm/branch.h>
 #include <asm/byteorder.h>
+#include <asm/cop2.h>
 #include <asm/inst.h>
 #include <asm/uaccess.h>
 #include <asm/system.h>
@@ -451,17 +452,27 @@ static void emulate_load_store_insn(struct pt_regs *regs,
                  */
                 goto sigbus;
 
+        /*
+         * COP2 is available to implementor for application specific use.
+         * It's up to applications to register a notifier chain and do
+         * whatever they have to do, including possible sending of signals.
+         */
         case lwc2_op:
+                cu2_notifier_call_chain(CU2_LWC2_OP, regs);
+                break;
+
         case ldc2_op:
+                cu2_notifier_call_chain(CU2_LDC2_OP, regs);
+                break;
+
         case swc2_op:
+                cu2_notifier_call_chain(CU2_SWC2_OP, regs);
+                break;
+
         case sdc2_op:
-                /*
-                 * These are the coprocessor 2 load/stores.  The current
-                 * implementations don't use cp2 and cp2 should always be
-                 * disabled in c0_status.  So send SIGILL.
-                 * (No longer true: The Sony Praystation uses cp2 for
-                 * 3D matrix operations.  Dunno if that thingy has a MMU ...)
-                 */
+                cu2_notifier_call_chain(CU2_SDC2_OP, regs);
+                break;
+
         default:
                 /*
                  * Pheeee...  We encountered an yet unknown instruction or