Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus

* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  [MIPS] Fix smp barriers in test_and_{change,clear,set}_bit
  [MIPS] Fix IP27 build
  [MIPS] Fix modpost warnings by making start_secondary __cpuinit
  [MIPS] SMTC: Fix build error caused by nonsense code.
  [MIPS] SMTC: The MT ASE requires to initialize c0_pagemask and c0_wired.
  [MIPS] SMTC: Don't continue in set_vi_srs_handler on detected bad arguments.
  [MIPS] SMTC: Fix warning.
  [MIPS] Wire up utimensat, signalfd, timerfd, eventfd
  [MIPS] Atlas: Fix build.
  [MIPS] Always install the DSP exception handler.
  [MIPS] SMTC: Don't set and restore irqregs ptr from self_ipi.
  [MIPS] Fix KMODE for the R3000

1 files changed, 11 insertions, 4 deletions

diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 3f58b6ac1358..a7a17eb9bfcd 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -11,6 +11,7 @@
  * Copyright (C) 2000, 01 MIPS Technologies, Inc.
  * Copyright (C) 2002, 2003, 2004, 2005  Maciej W. Rozycki
  */
+#include <linux/bug.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -1190,8 +1191,8 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs)
 
                 memcpy (b, &except_vec_vi, handler_len);
 #ifdef CONFIG_MIPS_MT_SMTC
-                if (n > 7)
-                        printk("Vector index %d exceeds SMTC maximum\n", n);
+                BUG_ON(n > 7);  /* Vector index %d exceeds SMTC maximum. */
+
                 w = (u32 *)(b + mori_offset);
                 *w = (*w & 0xffff0000) | (0x100 << n);
 #endif /* CONFIG_MIPS_MT_SMTC */
@@ -1383,6 +1384,13 @@ void __init per_cpu_trap_init(void)
                 cpu_cache_init();
                 tlb_init();
 #ifdef CONFIG_MIPS_MT_SMTC
+        } else if (!secondaryTC) {
+                /*
+                 * First TC in non-boot VPE must do subset of tlb_init()
+                 * for MMU countrol registers.
+                 */
+                write_c0_pagemask(PM_DEFAULT_MASK);
+                write_c0_wired(0);
         }
 #endif /* CONFIG_MIPS_MT_SMTC */
 }
@@ -1531,8 +1539,7 @@ void __init trap_init(void)
         if (cpu_has_mipsmt)
                 set_except_vector(25, handle_mt);
 
-        if (cpu_has_dsp)
-                set_except_vector(26, handle_dsp);
+        set_except_vector(26, handle_dsp);
 
         if (cpu_has_vce)
                 /* Special exception: R4[04]00 uses also the divec space. */