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authorRalf Baechle <ralf@linux-mips.org>2007-06-20 17:27:10 -0400
committerRalf Baechle <ralf@linux-mips.org>2007-06-20 17:27:10 -0400
commit3b1d4ed5353af04d6aa20be2701727b9cdb2ac61 (patch)
treee4a3335c925abd933f1650e1ee4786e6bfad8f35 /arch/mips/kernel/time.c
parent7c8545e98468c53809fc06788a3b9a34dff05240 (diff)
[MIPS] Don't drag a platform specific header into generic arch code.
For some platforms it's definitions may conflict. So that's the one-liner. The rest is 10 square kilometers of collateral damage fixup this include used to paper over. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/time.c')
-rw-r--r--arch/mips/kernel/time.c13
1 files changed, 9 insertions, 4 deletions
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index 7def1ff3da94..d48d1d5bea0a 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -200,10 +200,15 @@ EXPORT_SYMBOL(null_perf_irq);
200EXPORT_SYMBOL(perf_irq); 200EXPORT_SYMBOL(perf_irq);
201 201
202/* 202/*
203 * Timer interrupt
204 */
205int cp0_compare_irq;
206
207/*
203 * Performance counter IRQ or -1 if shared with timer 208 * Performance counter IRQ or -1 if shared with timer
204 */ 209 */
205int mipsxx_perfcount_irq; 210int cp0_perfcount_irq;
206EXPORT_SYMBOL(mipsxx_perfcount_irq); 211EXPORT_SYMBOL_GPL(cp0_perfcount_irq);
207 212
208/* 213/*
209 * Possibly handle a performance counter interrupt. 214 * Possibly handle a performance counter interrupt.
@@ -213,12 +218,12 @@ static inline int handle_perf_irq (int r2)
213{ 218{
214 /* 219 /*
215 * The performance counter overflow interrupt may be shared with the 220 * The performance counter overflow interrupt may be shared with the
216 * timer interrupt (mipsxx_perfcount_irq < 0). If it is and a 221 * timer interrupt (cp0_perfcount_irq < 0). If it is and a
217 * performance counter has overflowed (perf_irq() == IRQ_HANDLED) 222 * performance counter has overflowed (perf_irq() == IRQ_HANDLED)
218 * and we can't reliably determine if a counter interrupt has also 223 * and we can't reliably determine if a counter interrupt has also
219 * happened (!r2) then don't check for a timer interrupt. 224 * happened (!r2) then don't check for a timer interrupt.
220 */ 225 */
221 return (mipsxx_perfcount_irq < 0) && 226 return (cp0_perfcount_irq < 0) &&
222 perf_irq() == IRQ_HANDLED && 227 perf_irq() == IRQ_HANDLED &&
223 !r2; 228 !r2;
224} 229}