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authorKevin D. Kissell <kevink@mips.com>2007-03-21 08:28:37 -0400
committerRalf Baechle <ralf@linux-mips.org>2007-10-29 15:35:32 -0400
commitbe5f1f2114665508a722e3924a3a7f477c502841 (patch)
tree77319ff792fa6e08a0e7c63f1828295219e7f398 /arch/mips/kernel/smtc.c
parent2a397e82c7db18019e408f953dd58dc1963a328c (diff)
[MIPS] SMTC: Allow control over TC assignment to vpe0.
Modify the SMTC initialization code to allow boot-time specification not only of how many VPEs and TCs to use, but also how many TCs out of the allowed pool are to be bound to VPE 0. The new boot option is "vpe0tcs=N", where N is an integer. Using it in combination with the existing options allows arbitrary assignments across the 2 VPEs of a 34K. e.g. "maxtcs=3 vpe0tcs=1" forces VPE0 to have 1 TC, while VPE1 has 2, and "maxtcs=4 vpe0tcs=3" forces VPE0 to have 3 TCs, while VPE1 gets 1. If no vpe0tcs option is specified, the traditional algorithm of evenly dividing TCs between available VPEs, with the odd "slop" going to VPE0, is retained. The reason for doing this is to allow a finer balancing of TCs which can handle I/O interrupts on Malta (those on VPE 0) and those which cannot. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/smtc.c')
-rw-r--r--arch/mips/kernel/smtc.c57
1 files changed, 44 insertions, 13 deletions
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index a8c1a698d588..9c92d42996cb 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -88,11 +88,19 @@ unsigned int smtc_status = 0;
88 88
89/* Boot command line configuration overrides */ 89/* Boot command line configuration overrides */
90 90
91static int vpe0limit;
91static int ipibuffers = 0; 92static int ipibuffers = 0;
92static int nostlb = 0; 93static int nostlb = 0;
93static int asidmask = 0; 94static int asidmask = 0;
94unsigned long smtc_asid_mask = 0xff; 95unsigned long smtc_asid_mask = 0xff;
95 96
97static int __init vpe0tcs(char *str)
98{
99 get_option(&str, &vpe0limit);
100
101 return 1;
102}
103
96static int __init ipibufs(char *str) 104static int __init ipibufs(char *str)
97{ 105{
98 get_option(&str, &ipibuffers); 106 get_option(&str, &ipibuffers);
@@ -125,6 +133,7 @@ static int __init asidmask_set(char *str)
125 return 1; 133 return 1;
126} 134}
127 135
136__setup("vpe0tcs=", vpe0tcs);
128__setup("ipibufs=", ipibufs); 137__setup("ipibufs=", ipibufs);
129__setup("nostlb", stlb_disable); 138__setup("nostlb", stlb_disable);
130__setup("asidmask=", asidmask_set); 139__setup("asidmask=", asidmask_set);
@@ -340,7 +349,7 @@ static void smtc_tc_setup(int vpe, int tc, int cpu)
340 349
341void mipsmt_prepare_cpus(void) 350void mipsmt_prepare_cpus(void)
342{ 351{
343 int i, vpe, tc, ntc, nvpe, tcpervpe, slop, cpu; 352 int i, vpe, tc, ntc, nvpe, tcpervpe[NR_CPUS], slop, cpu;
344 unsigned long flags; 353 unsigned long flags;
345 unsigned long val; 354 unsigned long val;
346 int nipi; 355 int nipi;
@@ -401,8 +410,39 @@ void mipsmt_prepare_cpus(void)
401 ntc = NR_CPUS; 410 ntc = NR_CPUS;
402 if (tclimit > 0 && ntc > tclimit) 411 if (tclimit > 0 && ntc > tclimit)
403 ntc = tclimit; 412 ntc = tclimit;
404 tcpervpe = ntc / nvpe; 413 slop = ntc % nvpe;
405 slop = ntc % nvpe; /* Residual TCs, < NVPE */ 414 for (i = 0; i < nvpe; i++) {
415 tcpervpe[i] = ntc / nvpe;
416 if (slop) {
417 if((slop - i) > 0) tcpervpe[i]++;
418 }
419 }
420 /* Handle command line override for VPE0 */
421 if (vpe0limit > ntc) vpe0limit = ntc;
422 if (vpe0limit > 0) {
423 int slopslop;
424 if (vpe0limit < tcpervpe[0]) {
425 /* Reducing TC count - distribute to others */
426 slop = tcpervpe[0] - vpe0limit;
427 slopslop = slop % (nvpe - 1);
428 tcpervpe[0] = vpe0limit;
429 for (i = 1; i < nvpe; i++) {
430 tcpervpe[i] += slop / (nvpe - 1);
431 if(slopslop && ((slopslop - (i - 1) > 0)))
432 tcpervpe[i]++;
433 }
434 } else if (vpe0limit > tcpervpe[0]) {
435 /* Increasing TC count - steal from others */
436 slop = vpe0limit - tcpervpe[0];
437 slopslop = slop % (nvpe - 1);
438 tcpervpe[0] = vpe0limit;
439 for (i = 1; i < nvpe; i++) {
440 tcpervpe[i] -= slop / (nvpe - 1);
441 if(slopslop && ((slopslop - (i - 1) > 0)))
442 tcpervpe[i]--;
443 }
444 }
445 }
406 446
407 /* Set up shared TLB */ 447 /* Set up shared TLB */
408 smtc_configure_tlb(); 448 smtc_configure_tlb();
@@ -416,7 +456,7 @@ void mipsmt_prepare_cpus(void)
416 if (vpe != 0) 456 if (vpe != 0)
417 printk(", "); 457 printk(", ");
418 printk("VPE %d: TC", vpe); 458 printk("VPE %d: TC", vpe);
419 for (i = 0; i < tcpervpe; i++) { 459 for (i = 0; i < tcpervpe[vpe]; i++) {
420 /* 460 /*
421 * TC 0 is bound to VPE 0 at reset, 461 * TC 0 is bound to VPE 0 at reset,
422 * and is presumably executing this 462 * and is presumably executing this
@@ -429,15 +469,6 @@ void mipsmt_prepare_cpus(void)
429 printk(" %d", tc); 469 printk(" %d", tc);
430 tc++; 470 tc++;
431 } 471 }
432 if (slop) {
433 if (tc != 0) {
434 smtc_tc_setup(vpe, tc, cpu);
435 cpu++;
436 }
437 printk(" %d", tc);
438 tc++;
439 slop--;
440 }
441 if (vpe != 0) { 472 if (vpe != 0) {
442 /* 473 /*
443 * Clear any stale software interrupts from VPE's Cause 474 * Clear any stale software interrupts from VPE's Cause