diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2007-03-27 10:19:58 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2007-03-29 18:46:36 -0400 |
commit | 20bb25d10fe5569df8f3f186a36e5548582854d9 (patch) | |
tree | de57dcfa1b679d492f1281a3b7e9d69e12fc6c0f /arch/mips/kernel/smtc.c | |
parent | ae036b790891565c5b4b64e616ed497138d1f8d6 (diff) |
[MIPS] SMTC: Fix false trigger of debug code on single VPE.
Make smtc_setup_irq() update the list of interrupts which need to be
watched by the debug code itself. Also there is no need to initialize the
IPI swint when running with a single VPE, so don't initialize it.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/smtc.c')
-rw-r--r-- | arch/mips/kernel/smtc.c | 20 |
1 files changed, 15 insertions, 5 deletions
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c index cba17a8f53d0..e50fe20571f0 100644 --- a/arch/mips/kernel/smtc.c +++ b/arch/mips/kernel/smtc.c | |||
@@ -77,7 +77,7 @@ static struct smtc_ipi_q freeIPIq; | |||
77 | 77 | ||
78 | void ipi_decode(struct smtc_ipi *); | 78 | void ipi_decode(struct smtc_ipi *); |
79 | static void post_direct_ipi(int cpu, struct smtc_ipi *pipi); | 79 | static void post_direct_ipi(int cpu, struct smtc_ipi *pipi); |
80 | static void setup_cross_vpe_interrupts(void); | 80 | static void setup_cross_vpe_interrupts(unsigned int nvpe); |
81 | void init_smtc_stats(void); | 81 | void init_smtc_stats(void); |
82 | 82 | ||
83 | /* Global SMTC Status */ | 83 | /* Global SMTC Status */ |
@@ -170,7 +170,10 @@ __setup("tintq=", tintq); | |||
170 | 170 | ||
171 | int imstuckcount[2][8]; | 171 | int imstuckcount[2][8]; |
172 | /* vpemask represents IM/IE bits of per-VPE Status registers, low-to-high */ | 172 | /* vpemask represents IM/IE bits of per-VPE Status registers, low-to-high */ |
173 | int vpemask[2][8] = {{0,1,1,0,0,0,0,1},{0,1,0,0,0,0,0,1}}; | 173 | int vpemask[2][8] = { |
174 | {0, 0, 1, 0, 0, 0, 0, 1}, | ||
175 | {0, 0, 0, 0, 0, 0, 0, 1} | ||
176 | }; | ||
174 | int tcnoprog[NR_CPUS]; | 177 | int tcnoprog[NR_CPUS]; |
175 | static atomic_t idle_hook_initialized = {0}; | 178 | static atomic_t idle_hook_initialized = {0}; |
176 | static int clock_hang_reported[NR_CPUS]; | 179 | static int clock_hang_reported[NR_CPUS]; |
@@ -503,8 +506,7 @@ void mipsmt_prepare_cpus(void) | |||
503 | 506 | ||
504 | /* If we have multiple VPEs running, set up the cross-VPE interrupt */ | 507 | /* If we have multiple VPEs running, set up the cross-VPE interrupt */ |
505 | 508 | ||
506 | if (nvpe > 1) | 509 | setup_cross_vpe_interrupts(nvpe); |
507 | setup_cross_vpe_interrupts(); | ||
508 | 510 | ||
509 | /* Set up queue of free IPI "messages". */ | 511 | /* Set up queue of free IPI "messages". */ |
510 | nipi = NR_CPUS * IPIBUF_PER_CPU; | 512 | nipi = NR_CPUS * IPIBUF_PER_CPU; |
@@ -609,7 +611,12 @@ void smtc_cpus_done(void) | |||
609 | int setup_irq_smtc(unsigned int irq, struct irqaction * new, | 611 | int setup_irq_smtc(unsigned int irq, struct irqaction * new, |
610 | unsigned long hwmask) | 612 | unsigned long hwmask) |
611 | { | 613 | { |
614 | unsigned int vpe = current_cpu_data.vpe_id; | ||
615 | |||
612 | irq_hwmask[irq] = hwmask; | 616 | irq_hwmask[irq] = hwmask; |
617 | #ifdef CONFIG_SMTC_IDLE_HOOK_DEBUG | ||
618 | vpemask[vpe][irq - MIPSCPU_INT_BASE] = 1; | ||
619 | #endif | ||
613 | 620 | ||
614 | return setup_irq(irq, new); | 621 | return setup_irq(irq, new); |
615 | } | 622 | } |
@@ -970,8 +977,11 @@ static void ipi_irq_dispatch(void) | |||
970 | 977 | ||
971 | static struct irqaction irq_ipi; | 978 | static struct irqaction irq_ipi; |
972 | 979 | ||
973 | static void setup_cross_vpe_interrupts(void) | 980 | static void setup_cross_vpe_interrupts(unsigned int nvpe) |
974 | { | 981 | { |
982 | if (nvpe < 1) | ||
983 | return; | ||
984 | |||
975 | if (!cpu_has_vint) | 985 | if (!cpu_has_vint) |
976 | panic("SMTC Kernel requires Vectored Interupt support"); | 986 | panic("SMTC Kernel requires Vectored Interupt support"); |
977 | 987 | ||