[MIPS] Define MIPS_CPU_IRQ_BASE in generic header

The irq_base for {mips,rm7k,rm9k}_cpu_irq_init() are constant on all
platforms and are same value on most platforms (0 or 16, depends on
CONFIG_I8259).  Define them in asm-mips/mach-generic/irq.h and make
them customizable.  This will save a few cycle on each CPU interrupt.

A good side effect is removing some dependencies to MALTA in generic
SMTC code.

Although MIPS_CPU_IRQ_BASE is customizable, this patch changes irq
mappings on DDB5477, EMMA2RH and MIPS_SIM, since really customizing
them might cause some header dependency problem and there seems no
good reason to customize it.  So currently only VR41XX is using custom
MIPS_CPU_IRQ_BASE value, which is 0 regardless of CONFIG_I8259.

Testing this patch on those platforms is greatly appreciated.  Thank
you.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1 files changed, 4 insertions, 5 deletions

diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c
index 1ee689c0e0c9..64b62bdfb4f6 100644
--- a/arch/mips/kernel/smp-mt.c
+++ b/arch/mips/kernel/smp-mt.c
@@ -35,7 +35,6 @@
 #include <asm/mipsregs.h>
 #include <asm/mipsmtregs.h>
 #include <asm/mips_mt.h>
-#include <asm/mips-boards/maltaint.h>  /* This is f*cking wrong */
 
 #define MIPS_CPU_IPI_RESCHED_IRQ 0
 #define MIPS_CPU_IPI_CALL_IRQ 1
@@ -108,12 +107,12 @@ void __init sanitize_tlb_entries(void)
 
 static void ipi_resched_dispatch(void)
 {
-        do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ);
+        do_IRQ(MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_RESCHED_IRQ);
 }
 
 static void ipi_call_dispatch(void)
 {
-        do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_IPI_CALL_IRQ);
+        do_IRQ(MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_CALL_IRQ);
 }
 
 static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id)
@@ -270,8 +269,8 @@ void __init plat_prepare_cpus(unsigned int max_cpus)
                 set_vi_handler(MIPS_CPU_IPI_CALL_IRQ, ipi_call_dispatch);
         }
 
-        cpu_ipi_resched_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ;
-        cpu_ipi_call_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_CALL_IRQ;
+        cpu_ipi_resched_irq = MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_RESCHED_IRQ;
+        cpu_ipi_call_irq = MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_CALL_IRQ;
 
         setup_irq(cpu_ipi_resched_irq, &irq_resched);
         setup_irq(cpu_ipi_call_irq, &irq_call);