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authorBruno Randolf <randolf.bruno@googlemail.com>2010-07-11 11:40:28 -0400
committerRalf Baechle <ralf@linux-mips.org>2010-07-26 14:08:17 -0400
commit98a0f86a54bb195c28ae1ccb5a5f5cda12cf7121 (patch)
tree9b4563fbf5ea0191dac4af7c8523fa35dba9f524 /arch/mips/kernel/scall64-n32.S
parent1ed845375b1f2938acc4496a186e180892b00c71 (diff)
MIPS: MTX-1: Fix PCI on the MeshCube and related boards
This patch fixes a regression introduced by commit "MIPS: Alchemy: MTX-1: Use linux gpio api." (bb706b28bbd647c2fd7f22d6bf03a18b9552be05) which broke PCI bus operation. The problem is caused by alchemy_gpio2_enable() which resets the GPIO2 block. Two PCI signals (PCI_SERR and PCI_RST) are connected to GPIO2 and they obviously do not to like the reset. Since GPIO2 is correctly initialized by the boot monitor (YAMON) it is not necessary to call this function, so just remove it. Also replace gpio_set_value() with alchemy_gpio_set_value() to avoid problems in case gpiolib gets initialized after PCI. And since alchemy gpio_set_value() calls au_sync() we don't have to au_sync() again later. Signed-off-by: Bruno Randolf <br1@einfach.org> To: linux-mips@linux-mips.org To: manuel.lauss@googlemail.com Patchwork: https://patchwork.linux-mips.org/patch/1448/ Tested-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/scall64-n32.S')
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