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| author | Ralf Baechle <ralf@linux-mips.org> | 2014-03-31 12:17:33 -0400 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-03-31 12:17:33 -0400 |
| commit | ade63aada79c61bcd5f51cbd310f237399892268 (patch) | |
| tree | 4f8605528bfd9b6261679883974b9ac4870223dd /arch/mips/kernel/r4k_fpu.S | |
| parent | 9a1724c7506bfa7d3d9dcab13f83e9e6446929f9 (diff) | |
| parent | c14af233fbe279d0e561ecf84f1208b1bae087ef (diff) | |
Merge branch '3.14-fixes' into mips-for-linux-next
Diffstat (limited to 'arch/mips/kernel/r4k_fpu.S')
| -rw-r--r-- | arch/mips/kernel/r4k_fpu.S | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S index 0cfa7a56a153..71814272d148 100644 --- a/arch/mips/kernel/r4k_fpu.S +++ b/arch/mips/kernel/r4k_fpu.S | |||
| @@ -36,9 +36,9 @@ | |||
| 36 | LEAF(_save_fp_context) | 36 | LEAF(_save_fp_context) |
| 37 | cfc1 t1, fcr31 | 37 | cfc1 t1, fcr31 |
| 38 | 38 | ||
| 39 | #if defined(CONFIG_64BIT) || defined(CONFIG_MIPS32_R2) | 39 | #if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) |
| 40 | .set push | 40 | .set push |
| 41 | #ifdef CONFIG_MIPS32_R2 | 41 | #ifdef CONFIG_CPU_MIPS32_R2 |
| 42 | .set mips64r2 | 42 | .set mips64r2 |
| 43 | mfc0 t0, CP0_STATUS | 43 | mfc0 t0, CP0_STATUS |
| 44 | sll t0, t0, 5 | 44 | sll t0, t0, 5 |
| @@ -147,11 +147,11 @@ LEAF(_save_fp_context32) | |||
| 147 | * - cp1 status/control register | 147 | * - cp1 status/control register |
| 148 | */ | 148 | */ |
| 149 | LEAF(_restore_fp_context) | 149 | LEAF(_restore_fp_context) |
| 150 | EX lw t0, SC_FPC_CSR(a0) | 150 | EX lw t1, SC_FPC_CSR(a0) |
| 151 | 151 | ||
| 152 | #if defined(CONFIG_64BIT) || defined(CONFIG_MIPS32_R2) | 152 | #if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) |
| 153 | .set push | 153 | .set push |
| 154 | #ifdef CONFIG_MIPS32_R2 | 154 | #ifdef CONFIG_CPU_MIPS32_R2 |
| 155 | .set mips64r2 | 155 | .set mips64r2 |
| 156 | mfc0 t0, CP0_STATUS | 156 | mfc0 t0, CP0_STATUS |
| 157 | sll t0, t0, 5 | 157 | sll t0, t0, 5 |
| @@ -192,7 +192,7 @@ LEAF(_restore_fp_context) | |||
| 192 | EX ldc1 $f26, SC_FPREGS+208(a0) | 192 | EX ldc1 $f26, SC_FPREGS+208(a0) |
| 193 | EX ldc1 $f28, SC_FPREGS+224(a0) | 193 | EX ldc1 $f28, SC_FPREGS+224(a0) |
| 194 | EX ldc1 $f30, SC_FPREGS+240(a0) | 194 | EX ldc1 $f30, SC_FPREGS+240(a0) |
| 195 | ctc1 t0, fcr31 | 195 | ctc1 t1, fcr31 |
| 196 | jr ra | 196 | jr ra |
| 197 | li v0, 0 # success | 197 | li v0, 0 # success |
| 198 | END(_restore_fp_context) | 198 | END(_restore_fp_context) |
| @@ -200,7 +200,7 @@ LEAF(_restore_fp_context) | |||
| 200 | #ifdef CONFIG_MIPS32_COMPAT | 200 | #ifdef CONFIG_MIPS32_COMPAT |
| 201 | LEAF(_restore_fp_context32) | 201 | LEAF(_restore_fp_context32) |
| 202 | /* Restore an o32 sigcontext. */ | 202 | /* Restore an o32 sigcontext. */ |
| 203 | EX lw t0, SC32_FPC_CSR(a0) | 203 | EX lw t1, SC32_FPC_CSR(a0) |
| 204 | 204 | ||
| 205 | mfc0 t0, CP0_STATUS | 205 | mfc0 t0, CP0_STATUS |
| 206 | sll t0, t0, 5 | 206 | sll t0, t0, 5 |
| @@ -240,7 +240,7 @@ LEAF(_restore_fp_context32) | |||
| 240 | EX ldc1 $f26, SC32_FPREGS+208(a0) | 240 | EX ldc1 $f26, SC32_FPREGS+208(a0) |
| 241 | EX ldc1 $f28, SC32_FPREGS+224(a0) | 241 | EX ldc1 $f28, SC32_FPREGS+224(a0) |
| 242 | EX ldc1 $f30, SC32_FPREGS+240(a0) | 242 | EX ldc1 $f30, SC32_FPREGS+240(a0) |
| 243 | ctc1 t0, fcr31 | 243 | ctc1 t1, fcr31 |
| 244 | jr ra | 244 | jr ra |
| 245 | li v0, 0 # success | 245 | li v0, 0 # success |
| 246 | END(_restore_fp_context32) | 246 | END(_restore_fp_context32) |